From: R Veera Kumar <vklr@vkten.in>
Date: Thu, 11 Nov 2021 05:39:12 +0000 (+0530)
Subject: Add expected state to case_addze for addze in alu_cases unit test
X-Git-Tag: sv_maxu_works-initial~751
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ce665ff472f07bce2da662c79a275597dbf56999;p=openpower-isa.git

Add expected state to case_addze for addze in alu_cases unit test

Now for only addze opcode
Removed a not needed self.add_case line
---

diff --git a/src/openpower/test/alu/alu_cases.py b/src/openpower/test/alu/alu_cases.py
index f7041d38..78303852 100644
--- a/src/openpower/test/alu/alu_cases.py
+++ b/src/openpower/test/alu/alu_cases.py
@@ -119,9 +119,13 @@ class ALUTestCase(TestAccumulatorBase):
             lst = [f"{choice} 6, 16"]
             initial_regs = [0] * 32
             initial_regs[16] = 0x00ff00ff00ff0080
-            self.add_case(Program(lst, bigendian), initial_regs)
-
-        self.add_case(Program(lst, bigendian), initial_regs)
+            if choice == "addze":
+                e = ExpectedState(pc=4)
+                e.intregs[6] = 0xff00ff00ff0080
+                e.intregs[16] = 0xff00ff00ff0080
+                self.add_case(Program(lst, bigendian), initial_regs, expected=e)
+            else:
+                self.add_case(Program(lst, bigendian), initial_regs)
 
     def case_addis_nonzero_r0_regression(self):
         lst = [f"addis 3, 0, 1"]