From: Clifford Wolf <clifford@clifford.at>
Date: Mon, 17 Dec 2018 15:26:57 +0000 (+0100)
Subject: Merge pull request #744 from whitequark/write_verilog_$shift
X-Git-Tag: yosys-0.9~369
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ce701fd3348f43e66a445ef58e4818adaf3e574d;p=yosys.git

Merge pull request #744 from whitequark/write_verilog_$shift

write_verilog: handle the $shift cell
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ce701fd3348f43e66a445ef58e4818adaf3e574d