From: Chenghua Xu <paul.hua.gm@gmail.com>
Date: Thu, 19 Jan 2017 16:26:32 +0000 (+0000)
Subject: MIPS: Make loongson3a use fused madd.d
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cedb7e2c853eafc4860ae6a8832c048c4affd883;p=gcc.git

MIPS: Make loongson3a use fused madd.d

gcc/
	* config/mips/mips.h (ISA_HAS_FUSED_MADD4): Enable for
	TARGET_LOONGSON_3A.
	(ISA_HAS_UNFUSED_MADD4): Exclude TARGET_LOONGSON_3A.

From-SVN: r244641
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f933e1ad240..e53f9e1a670 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-01-19  Chenghua Xu  <paul.hua.gm@gmail.com>
+
+	* config/mips/mips.h (ISA_HAS_FUSED_MADD4): Enable for
+	TARGET_LOONGSON_3A.
+	(ISA_HAS_UNFUSED_MADD4): Exclude TARGET_LOONGSON_3A.
+
 2017-01-19  Doug Gilmore  <doug.gilmore@imgtec.com>
 
 	PR target/78176
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 4205589af45..81032c9f94c 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1066,11 +1066,13 @@ struct mips_cpu_info {
 
 /* ISA has 4 operand fused madd instructions of the form
    'd = [+-] (a * b [+-] c)'.  */
-#define ISA_HAS_FUSED_MADD4	TARGET_MIPS8000
+#define ISA_HAS_FUSED_MADD4	(TARGET_MIPS8000 || TARGET_LOONGSON_3A)
 
 /* ISA has 4 operand unfused madd instructions of the form
    'd = [+-] (a * b [+-] c)'.  */
-#define ISA_HAS_UNFUSED_MADD4	(ISA_HAS_FP4 && !TARGET_MIPS8000)
+#define ISA_HAS_UNFUSED_MADD4	(ISA_HAS_FP4				\
+				 && !TARGET_MIPS8000			\
+				 && !TARGET_LOONGSON_3A)
 
 /* ISA has 3 operand r6 fused madd instructions of the form
    'c = c [+-] (a * b)'.  */