From: Alan Modra <amodra@gmail.com>
Date: Wed, 3 Aug 2016 00:35:14 +0000 (+0930)
Subject: [RS6000] cost SLOW_UNALIGNED_ACCESS
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cef58349a086b8294d14514c37fbacdf44395d18;p=gcc.git

[RS6000] cost SLOW_UNALIGNED_ACCESS

	* config/rs6000/rs6000.c (rs6000_rtx_costs): Make unaligned mem
	cost more.

From-SVN: r239012
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a75f39fdbbb..e8de5b9f605 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-08-03  Alan Modra  <amodra@gmail.com>
+
+	* config/rs6000/rs6000.c (rs6000_rtx_costs): Make unaligned mem
+	cost more.
+
 2016-08-03  Alan Modra  <amodra@gmail.com>
 
 	* config/rs6000/rs6000.md (fix_trunc<mode>si2): Force source operand
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 5b9aae27681..2ae3e7e6796 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -34336,11 +34336,16 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code,
     case CONST:
     case HIGH:
     case SYMBOL_REF:
+      *total = !speed ? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (2);
+      return true;
+
     case MEM:
       /* When optimizing for size, MEM should be slightly more expensive
 	 than generating address, e.g., (plus (reg) (const)).
 	 L1 cache latency is about two instructions.  */
       *total = !speed ? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (2);
+      if (SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (x)))
+	*total += COSTS_N_INSNS (100);
       return true;
 
     case LABEL_REF: