From: Kenneth Graunke Date: Thu, 27 Sep 2018 08:39:04 +0000 (+0200) Subject: iris: results write X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cf261caad93a4188e1022aa9360c6bf8c59c38d4;p=mesa.git iris: results write --- diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index c7627c15de3..1d51316c625 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -292,6 +292,10 @@ struct iris_vtable { void (*store_data_imm64)(struct iris_batch *batch, struct iris_bo *bo, uint32_t offset, uint64_t value); + void (*copy_mem_mem)(struct iris_batch *batch, + struct iris_bo *dst_bo, uint32_t dst_offset, + struct iris_bo *src_bo, uint32_t src_offset, + unsigned bytes); void (*emit_raw_pipe_control)(struct iris_batch *batch, uint32_t flags, struct iris_bo *bo, uint32_t offset, uint64_t imm); diff --git a/src/gallium/drivers/iris/iris_query.c b/src/gallium/drivers/iris/iris_query.c index e4597ed7a7c..7ae346a52c7 100644 --- a/src/gallium/drivers/iris/iris_query.c +++ b/src/gallium/drivers/iris/iris_query.c @@ -325,6 +325,16 @@ iris_get_query_result_resource(struct pipe_context *ctx, struct iris_context *ice = (void *) ctx; struct iris_query *q = (void *) query; struct iris_batch *batch = &ice->render_batch; + unsigned snapshots_landed_offset = + offsetof(struct iris_query_snapshots, snapshots_landed); + + if (index == -1) { + /* They're asking for the availability of the result. */ + ice->vtbl.copy_mem_mem(batch, iris_resource_bo(p_res), offset, + q->bo, snapshots_landed_offset, + result_type <= PIPE_QUERY_TYPE_U32 ? 4 : 8); + return; + } if (!q->ready && q->map->snapshots_landed) { /* The final snapshots happen to have landed, so let's just compute @@ -353,8 +363,7 @@ iris_get_query_result_resource(struct pipe_context *ctx, if (predicated) { ice->vtbl.load_register_imm64(batch, MI_PREDICATE_SRC1, 0ull); ice->vtbl.load_register_mem64(batch, MI_PREDICATE_SRC0, q->bo, - offsetof(struct iris_query_snapshots, - snapshots_landed)); + snapshots_landed_offset); uint32_t predicate = MI_PREDICATE | MI_PREDICATE_LOADOP_LOADINV | MI_PREDICATE_COMBINEOP_SET | diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index e2c8412dc1d..7882061453c 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -4121,6 +4121,25 @@ iris_store_data_imm64(struct iris_batch *batch, } } +static void +iris_copy_mem_mem(struct iris_batch *batch, + struct iris_bo *dst_bo, uint32_t dst_offset, + struct iris_bo *src_bo, uint32_t src_offset, + unsigned bytes) +{ + /* MI_COPY_MEM_MEM operates on DWords. */ + assert(bytes % 4 == 0); + assert(dst_offset % 4 == 0); + assert(src_offset % 4 == 0); + + for (unsigned i = 0; i < bytes; i += 4) { + iris_emit_cmd(batch, GENX(MI_COPY_MEM_MEM), cp) { + cp.DestinationMemoryAddress = rw_bo(dst_bo, dst_offset + i); + cp.SourceMemoryAddress = ro_bo(src_bo, src_offset + i); + } + } +} + /* ------------------------------------------------------------------- */ static unsigned @@ -4593,6 +4612,7 @@ genX(init_state)(struct iris_context *ice) ice->vtbl.store_register_mem64 = iris_store_register_mem64; ice->vtbl.store_data_imm32 = iris_store_data_imm32; ice->vtbl.store_data_imm64 = iris_store_data_imm64; + ice->vtbl.copy_mem_mem = iris_copy_mem_mem; ice->vtbl.derived_program_state_size = iris_derived_program_state_size; ice->vtbl.store_derived_program_state = iris_store_derived_program_state; ice->vtbl.create_so_decl_list = iris_create_so_decl_list;