From: Michael Meissner Date: Fri, 5 Jan 1996 16:33:59 +0000 (+0000) Subject: Add -mcpu={505,821,860} support; Fixup common mode support; Make eabi not rely on GLD X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cf27b46744aec5430b81bf763171239bba0f4abb;p=gcc.git Add -mcpu={505,821,860} support; Fixup common mode support; Make eabi not rely on GLD From-SVN: r10942 --- diff --git a/gcc/config/rs6000/aix3newas.h b/gcc/config/rs6000/aix3newas.h index 285b9ee083c..1758e49eb28 100644 --- a/gcc/config/rs6000/aix3newas.h +++ b/gcc/config/rs6000/aix3newas.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000 POWER running AIX version 3.x with the fixed assembler. - Copyright (C) 1995 Free Software Foundation, Inc. + Copyright (C) 1995, 1996 Free Software Foundation, Inc. Contributed by Jason Merrill (jason@cygnus.com). This file is part of GNU CC. @@ -44,12 +44,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -mpwr} \ %{mcpu=rsc1: -mpwr} \ %{mcpu=403: -mppc} \ +%{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ %{mcpu=603: -mppc} \ %{mcpu=603e: -mppc} \ %{mcpu=604: -mppc} \ -%{mcpu=620: -mppc}" +%{mcpu=620: -mppc} \ +%{mcpu=821: -mppc} \ +%{mcpu=860: -mppc}" /* Define the options for the binder: Start text at 512, align all segments to 512 bytes, and warn if there is text relocation. diff --git a/gcc/config/rs6000/aix41.h b/gcc/config/rs6000/aix41.h index 1b7f6b0a7ef..a0de198c908 100644 --- a/gcc/config/rs6000/aix41.h +++ b/gcc/config/rs6000/aix41.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000 POWER running AIX version 4.1. - Copyright (C) 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc. Contributed by David Edelsohn (edelsohn@npac.syr.edu). This file is part of GNU CC. @@ -41,12 +41,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -mpwr} \ %{mcpu=rsc1: -mpwr} \ %{mcpu=403: -mppc} \ +%{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ %{mcpu=603: -mppc} \ %{mcpu=603e: -mppc} \ %{mcpu=604: -mppc} \ -%{mcpu=620: -mppc}" +%{mcpu=620: -mppc} \ +%{mcpu=821: -mppc} \ +%{mcpu=860: -mppc}" #undef CPP_PREDEFINES #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \ @@ -70,12 +73,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -D_ARCH_PWR} \ %{mcpu=rsc1: -D_ARCH_PWR} \ %{mcpu=403: -D_ARCH_PPC} \ +%{mcpu=505: -D_ARCH_PPC} \ %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ %{mcpu=602: -D_ARCH_PPC} \ %{mcpu=603: -D_ARCH_PPC} \ %{mcpu=603e: -D_ARCH_PPC} \ %{mcpu=604: -D_ARCH_PPC} \ -%{mcpu=620: -D_ARCH_PPC}" +%{mcpu=620: -D_ARCH_PPC} \ +%{mcpu=821: -D_ARCH_PPC} \ +%{mcpu=860: -D_ARCH_PPC}" #undef TARGET_DEFAULT #define TARGET_DEFAULT MASK_NEW_MNEMONICS diff --git a/gcc/config/rs6000/eabi-ci.asm b/gcc/config/rs6000/eabi-ci.asm index e69de29bb2d..678fa06367f 100644 --- a/gcc/config/rs6000/eabi-ci.asm +++ b/gcc/config/rs6000/eabi-ci.asm @@ -0,0 +1,76 @@ +# crti.s for eabi + +# Copyright (C) 1996 Free Software Foundation, Inc. +# Written By Michael Meissner +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2, or (at your option) any +# later version. +# +# In addition to the permissions in the GNU General Public License, the +# Free Software Foundation gives you unlimited permission to link the +# compiled version of this file with other programs, and to distribute +# those programs without any restriction coming from the use of this +# file. (The General Public License restrictions do apply in other +# respects; for example, they cover modification of the file, and +# distribution when not linked into another program.) +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; see the file COPYING. If not, write to +# the Free Software Foundation, 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# +# As a special exception, if you link this library with files +# compiled with GCC to produce an executable, this does not cause +# the resulting executable to be covered by the GNU General Public License. +# This exception does not however invalidate any other reasons why +# the executable file might be covered by the GNU General Public License. +# + +# This file just supplies labeled starting points for the .got* and other +# special sections. It is linked in first before other modules. + + .file "crti.s" + .ident "GNU C crti.s" + + .section ".got","w" + .globl __GOT_START__ + .type __GOT_START__,@object + .weak _GLOBAL_OFFSET_TABLE_ + .type _GLOBAL_OFFSET_TABLE_,@object + .weak _SDA_BASE_ + .type _SDA_BASE_,@object +__GOT_START__: +_GLOBAL_OFFSET_TABLE_: +_SDA_BASE_: + + .section ".got1","w" + .globl __GOT1_START__ + .type __GOT1_START__,@object +__GOT1_START__: + + .section ".got2","w" + .globl __GOT2_START__ + .type __GOT2_START__,@object +__GOT2_START__: + + .section ".fixup","w" + .globl __FIXUP_START__ + .type __FIXUP_START__,@object +__FIXUP_START__: + + .section ".ctors","w" + .globl __CTOR_LIST__ + .type __CTOR_LIST__,@object +__CTOR_LIST__: + + .section ".dtors","w" + .globl __CTOR_LIST__ + .type __CTOR_LIST__,@object +__DTOR_LIST__: diff --git a/gcc/config/rs6000/eabi-cn.asm b/gcc/config/rs6000/eabi-cn.asm index e69de29bb2d..44b58f0c2d4 100644 --- a/gcc/config/rs6000/eabi-cn.asm +++ b/gcc/config/rs6000/eabi-cn.asm @@ -0,0 +1,70 @@ +# crtn.s for eabi + +# Copyright (C) 1996 Free Software Foundation, Inc. +# Written By Michael Meissner +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2, or (at your option) any +# later version. +# +# In addition to the permissions in the GNU General Public License, the +# Free Software Foundation gives you unlimited permission to link the +# compiled version of this file with other programs, and to distribute +# those programs without any restriction coming from the use of this +# file. (The General Public License restrictions do apply in other +# respects; for example, they cover modification of the file, and +# distribution when not linked into another program.) +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; see the file COPYING. If not, write to +# the Free Software Foundation, 59 Temple Place - Suite 330, +# Boston, MA 02111-1307, USA. +# +# As a special exception, if you link this library with files +# compiled with GCC to produce an executable, this does not cause +# the resulting executable to be covered by the GNU General Public License. +# This exception does not however invalidate any other reasons why +# the executable file might be covered by the GNU General Public License. +# + +# This file just supplies labeled ending points for the .got* and other +# special sections. It is linked in last after other modules. + + .file "crtn.s" + .ident "GNU C crtn.s" + + .section ".got","w" + .globl __GOT_END__ + .type __GOT_END__,@object +__GOT_END__: + + .section ".got1","w" + .globl __GOT1_END__ + .type __GOT1_END__,@object +__GOT1_END__: + + .section ".got2","w" + .globl __GOT2_END__ + .type __GOT2_END__,@object +__GOT2_END__: + + .section ".fixup","w" + .globl __FIXUP_END__ + .type __FIXUP_END__,@object +__FIXUP_END__: + + .section ".ctors","w" + .globl __CTOR_END__ + .type __CTOR_END__,@object +__CTOR_END__: + + .section ".dtors","w" + .globl __CTOR_END__ + .type __CTOR_END__,@object +__DTOR_END__: diff --git a/gcc/config/rs6000/eabi.h b/gcc/config/rs6000/eabi.h index 6044be7622e..20bbde0605a 100644 --- a/gcc/config/rs6000/eabi.h +++ b/gcc/config/rs6000/eabi.h @@ -1,6 +1,6 @@ /* Core target definitions for GNU compiler for IBM RS/6000 PowerPC targeted to embedded ELF systems. - Copyright (C) 1995 Free Software Foundation, Inc. + Copyright (C) 1995, 1996 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -70,7 +70,7 @@ Boston, MA 02111-1307, USA. */ /* Use the simulator crt0 or mvme and libgloss/newlib libraries if desired */ #undef STARTFILE_SPEC -#define STARTFILE_SPEC "\ +#define STARTFILE_SPEC "crti.o \ %{mmvme: mvme-crt0.o%s} \ %{msim: sim-crt0.o%s}" @@ -83,4 +83,4 @@ Boston, MA 02111-1307, USA. */ #define LIBGCC_SPEC "libgcc.a%s" #undef ENDFILE_SPEC -#define ENDFILE_SPEC "" +#define ENDFILE_SPEC "crtn.o" diff --git a/gcc/config/rs6000/eabiaix.h b/gcc/config/rs6000/eabiaix.h index f27f7c87cab..7a70a9c9948 100644 --- a/gcc/config/rs6000/eabiaix.h +++ b/gcc/config/rs6000/eabiaix.h @@ -1,5 +1,5 @@ /* Embedded ELF system support, using old AIX based calling sequence. - Copyright (C) 1995 Free Software Foundation, Inc. + Copyright (C) 1995, 1996 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -51,12 +51,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -D_ARCH_PWR} \ %{mcpu=rsc1: -D_ARCH_PWR} \ %{mcpu=403: -D_ARCH_PPC} \ +%{mcpu=505: -D_ARCH_PPC} \ %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ %{mcpu=602: -D_ARCH_PPC} \ %{mcpu=603: -D_ARCH_PPC} \ %{mcpu=603e: -D_ARCH_PPC} \ %{mcpu=604: -D_ARCH_PPC} \ -%{mcpu=620: -D_ARCH_PPC}" +%{mcpu=620: -D_ARCH_PPC} \ +%{mcpu=821: -D_ARCH_PPC} \ +%{mcpu=860: -D_ARCH_PPC}" /* Define this macro as a C expression for the initializer of an array of string to tell the driver program which options are diff --git a/gcc/config/rs6000/eabile.h b/gcc/config/rs6000/eabile.h index d815239e759..3927c6b623a 100644 --- a/gcc/config/rs6000/eabile.h +++ b/gcc/config/rs6000/eabile.h @@ -1,6 +1,6 @@ /* Core target definitions for GNU compiler for PowerPC targeted to little endian embedded ELF systems. - Copyright (C) 1995 Free Software Foundation, Inc. + Copyright (C) 1995, 1996 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -52,12 +52,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -D_ARCH_PWR} \ %{mcpu=rsc1: -D_ARCH_PWR} \ %{mcpu=403: -D_ARCH_PPC} \ +%{mcpu=505: -D_ARCH_PPC} \ %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ %{mcpu=602: -D_ARCH_PPC} \ %{mcpu=603: -D_ARCH_PPC} \ %{mcpu=603e: -D_ARCH_PPC} \ %{mcpu=604: -D_ARCH_PPC} \ -%{mcpu=620: -D_ARCH_PPC}" +%{mcpu=620: -D_ARCH_PPC} \ +%{mcpu=821: -D_ARCH_PPC} \ +%{mcpu=860: -D_ARCH_PPC}" /* Define this macro as a C expression for the initializer of an array of string to tell the driver program which options are diff --git a/gcc/config/rs6000/eabisim.h b/gcc/config/rs6000/eabisim.h index 826801c8b96..318fc427232 100644 --- a/gcc/config/rs6000/eabisim.h +++ b/gcc/config/rs6000/eabisim.h @@ -1,6 +1,6 @@ /* Support for GCC on simulated PowerPC systems targeted to embedded ELF systems. - Copyright (C) 1995 Free Software Foundation, Inc. + Copyright (C) 1995, 1996 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -31,7 +31,7 @@ Boston, MA 02111-1307, USA. */ /* Use the simulator crt0 or mvme and libgloss/newlib libraries if desired */ #undef STARTFILE_SPEC -#define STARTFILE_SPEC "\ +#define STARTFILE_SPEC "crti.o \ %{mmvme: mvme-crt0.o%s} \ %{!mmvme: sim-crt0.o%s}" @@ -44,4 +44,4 @@ Boston, MA 02111-1307, USA. */ #define LIBGCC_SPEC "libgcc.a%s" #undef ENDFILE_SPEC -#define ENDFILE_SPEC "" +#define ENDFILE_SPEC "crtn.o" diff --git a/gcc/config/rs6000/lynx.h b/gcc/config/rs6000/lynx.h index 81bc2730dc8..4f1c934dbc4 100644 --- a/gcc/config/rs6000/lynx.h +++ b/gcc/config/rs6000/lynx.h @@ -1,5 +1,5 @@ /* Definitions for Rs6000 running LynxOS. - Copyright (C) 1995 Free Software Foundation, Inc. + Copyright (C) 1995, 1996 Free Software Foundation, Inc. Contributed by David Henkel-Wallace, Cygnus Support (gumby@cygnus.com) This file is part of GNU CC. @@ -91,12 +91,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -mpwr} \ %{mcpu=rsc1: -mpwr} \ %{mcpu=403: -mppc} \ +%{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ %{mcpu=603: -mppc} \ %{mcpu=603e: -mppc} \ %{mcpu=604: -mppc} \ -%{mcpu=620: -mppc}" +%{mcpu=620: -mppc} \ +%{mcpu=821: -mppc} \ +%{mcpu=860: -mppc}" #undef SUBTARGET_SWITCHES #define SUBTARGET_SWITCHES \ diff --git a/gcc/config/rs6000/netware.h b/gcc/config/rs6000/netware.h index 2683a08ac79..b11204c075f 100644 --- a/gcc/config/rs6000/netware.h +++ b/gcc/config/rs6000/netware.h @@ -1,6 +1,6 @@ /* Core target definitions for GNU compiler for IBM RS/6000 PowerPC running NetWare - Copyright (C) 1994 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -201,12 +201,15 @@ toc_section () \ %{mcpu=rsc: -mpwr} \ %{mcpu=rsc1: -mpwr} \ %{mcpu=403: -mppc} \ +%{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ %{mcpu=603: -mppc} \ %{mcpu=603e: -mppc} \ %{mcpu=604: -mppc} \ %{mcpu=620: -mppc} \ +%{mcpu=821: -mppc} \ +%{mcpu=860: -mppc} \ %{V} %{v:%{!V:-V}} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}" /* This is the end of what might become sysv4.h. */ diff --git a/gcc/config/rs6000/powerpc.h b/gcc/config/rs6000/powerpc.h index 694b6518398..5d915cb7492 100644 --- a/gcc/config/rs6000/powerpc.h +++ b/gcc/config/rs6000/powerpc.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000 PowerPC running AIX version 3.2. - Copyright (C) 1993, 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc. Contributed by David Edelsohn (edelsohn@npac.syr.edu). This file is part of GNU CC. @@ -42,12 +42,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -mpwr} \ %{mcpu=rsc1: -mpwr} \ %{mcpu=403: -mppc} \ +%{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ %{mcpu=603: -mppc} \ %{mcpu=603e: -mppc} \ %{mcpu=604: -mppc} \ -%{mcpu=620: -mppc}" +%{mcpu=620: -mppc} \ +%{mcpu=821: -mppc} \ +%{mcpu=860: -mppc}" #undef CPP_PREDEFINES #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \ @@ -72,12 +75,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -D_ARCH_PWR} \ %{mcpu=rsc1: -D_ARCH_PWR} \ %{mcpu=403: -D_ARCH_PPC} \ +%{mcpu=505: -D_ARCH_PPC} \ %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ %{mcpu=602: -D_ARCH_PPC} \ %{mcpu=603: -D_ARCH_PPC} \ %{mcpu=603e: -D_ARCH_PPC} \ %{mcpu=604: -D_ARCH_PPC} \ -%{mcpu=620: -D_ARCH_PPC}" +%{mcpu=620: -D_ARCH_PPC} \ +%{mcpu=821: -D_ARCH_PPC} \ +%{mcpu=860: -D_ARCH_PPC}" #undef TARGET_DEFAULT #define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 04399c2fdb8..7e630828133 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on IBM RS/6000. - Copyright (C) 1991, 1993, 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GNU CC. @@ -210,7 +210,8 @@ rs6000_override_options (default_cpu) int target_enable; /* Target flags to enable. */ int target_disable; /* Target flags to disable. */ } processor_target_table[] - = {{"common", PROCESSOR_COMMON, 0, POWER_MASKS | POWERPC_MASKS}, + = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, + POWER_MASKS | POWERPC_MASKS}, {"power", PROCESSOR_POWER, MASK_POWER | MASK_MULTIPLE | MASK_STRING, MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, @@ -238,12 +239,15 @@ rs6000_override_options (default_cpu) {"403", PROCESSOR_PPC403, MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, + {"505", PROCESSOR_MPCCORE, + MASK_POWERPC | MASK_NEW_MNEMONICS, + POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, {"601", PROCESSOR_PPC601, MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, {"602", PROCESSOR_PPC602, - MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS, - MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, + MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, + POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, {"603", PROCESSOR_PPC603, MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, @@ -255,7 +259,13 @@ rs6000_override_options (default_cpu) POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, {"620", PROCESSOR_PPC620, MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, - POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}}; + POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, + {"821", PROCESSOR_MPCCORE, + MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, + POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, + {"860", PROCESSOR_MPCCORE, + MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, + POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); @@ -267,8 +277,6 @@ rs6000_override_options (default_cpu) /* Identify the processor type */ rs6000_select[0].string = default_cpu; rs6000_cpu = PROCESSOR_DEFAULT; - if (rs6000_cpu == PROCESSOR_PPC403) - target_flags |= MASK_SOFT_FLOAT; for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) { @@ -323,9 +331,6 @@ rs6000_override_options (default_cpu) } } - if (!WORDS_BIG_ENDIAN && !TARGET_POWER && !TARGET_POWERPC) - error ("-mcpu=common is not supported for little endian platforms"); - #ifdef SUBTARGET_OVERRIDE_OPTIONS SUBTARGET_OVERRIDE_OPTIONS; #endif @@ -2562,6 +2567,8 @@ rs6000_stack_info () info_ptr->main_p = 1; #ifdef NAME__MAIN + info_ptr->calls_p = 1; + if (DECL_ARGUMENTS (current_function_decl)) { int i; @@ -2569,7 +2576,6 @@ rs6000_stack_info () info_ptr->main_save_p = 1; info_ptr->main_size = 0; - info_ptr->calls_p = 1; for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); arg != NULL_TREE && i < 8; diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 16faa3db193..002c5ee7717 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000. - Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GNU CC. @@ -68,12 +68,15 @@ Boston, MA 02111-1307, USA. */ %{mcpu=rsc: -D_ARCH_PWR} \ %{mcpu=rsc1: -D_ARCH_PWR} \ %{mcpu=403: -D_ARCH_PPC} \ +%{mcpu=505: -D_ARCH_PPC} \ %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ %{mcpu=602: -d_ARCH_PPC} \ %{mcpu=603: -D_ARCH_PPC} \ %{mcpu=603e: -D_ARCH_PPC} \ %{mcpu=604: -D_ARCH_PPC} \ -%{mcpu=620: -D_ARCH_PPC}" +%{mcpu=620: -D_ARCH_PPC} \ +%{mcpu=821: -D_ARCH_PPC} \ +%{mcpu=860: -D_ARCH_PPC}" /* Define the options for the binder: Start text at 512, align all segments to 512 bytes, and warn if there is text relocation. @@ -278,6 +281,7 @@ extern int target_flags; enum processor_type {PROCESSOR_RIOS1, PROCESSOR_RIOS2, + PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC601, PROCESSOR_PPC602, @@ -1818,6 +1822,7 @@ typedef struct rs6000_args : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ case PROCESSOR_RIOS2: \ + case PROCESSOR_MPCCORE: \ return COSTS_N_INSNS (2); \ case PROCESSOR_PPC601: \ case PROCESSOR_PPC603: \ @@ -1841,6 +1846,8 @@ typedef struct rs6000_args return COSTS_N_INSNS (19); \ case PROCESSOR_RIOS2: \ return COSTS_N_INSNS (13); \ + case PROCESSOR_MPCCORE: \ + return COSTS_N_INSNS (6); \ case PROCESSOR_PPC403: \ return COSTS_N_INSNS (33); \ case PROCESSOR_PPC601: \ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 087881eaac0..8cb317c8639 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -1,5 +1,5 @@ ;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler -;; Copyright (C) 1990, 91, 92, 93, 94, 1995 Free Software Foundation, Inc. +;; Copyright (C) 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GNU CC. @@ -40,7 +40,7 @@ ;; Processor type -- this attribute must exactly match the processor_type ;; enumeration in rs6000.h. -(define_attr "cpu" "rios1,rios2,ppc403,ppc601,ppc602,ppc603,ppc604,ppc620" +(define_attr "cpu" "rios1,rios2,mpccore,ppc403,ppc601,ppc602,ppc603,ppc604,ppc620" (const (symbol_ref "rs6000_cpu_attr"))) ; (define_function_unit NAME MULTIPLICITY SIMULTANEITY @@ -50,7 +50,7 @@ ; (POWER and 601 use Integer Unit) (define_function_unit "lsu" 1 0 (and (eq_attr "type" "load") - (eq_attr "cpu" "ppc602,ppc603,ppc604,ppc620")) + (eq_attr "cpu" "mpccore,ppc602,ppc603,ppc604,ppc620")) 2 1) (define_function_unit "lsu" 1 0 @@ -60,7 +60,7 @@ (define_function_unit "lsu" 1 0 (and (eq_attr "type" "fpload") - (eq_attr "cpu" "ppc602,ppc603")) + (eq_attr "cpu" "mpccore,ppc602,ppc603")) 2 1) (define_function_unit "iu" 1 0 @@ -75,11 +75,6 @@ ; Integer Unit (RIOS1, PPC601, PPC603) ; Trivial operations take one cycle which need not be listed here. -(define_function_unit "iu" 1 0 - (and (eq_attr "type" "integer") - (eq_attr "cpu" "rios1,ppc601")) - 1 1) - (define_function_unit "iu" 1 0 (and (eq_attr "type" "imul") (eq_attr "cpu" "rios1")) @@ -146,6 +141,18 @@ (eq_attr "cpu" "rios2")) 13 13) +; MPCCORE has separate IMUL/IDIV unit for multicycle instructions +; Divide latency varies greatly from 2-11, use 6 as average +(define_function_unit "imuldiv" 1 0 + (and (eq_attr "type" "imul") + (eq_attr "cpu" "mpccore")) + 2 1) + +(define_function_unit "imuldiv" 1 0 + (and (eq_attr "type" "idiv") + (eq_attr "cpu" "mpccore")) + 6 6) + ; PPC604 has two units that perform integer operations ; and one unit for divide/multiply operations (and move ; from/to spr). @@ -175,7 +182,7 @@ ; able to fill the compare-branch delay, with insns on iu/fpu. (define_function_unit "iu" 1 0 (and (eq_attr "type" "compare") - (eq_attr "cpu" "rios1,ppc601")) + (eq_attr "cpu" "rios1,mpccore,ppc601")) 1 1) (define_function_unit "iu2" 2 0 @@ -185,7 +192,7 @@ (define_function_unit "bpu" 1 0 (and (eq_attr "type" "compare") - (eq_attr "cpu" "rios1,rios2,ppc403,ppc601,ppc603,ppc604,ppc620")) + (eq_attr "cpu" "rios1,rios2,ppc403,mpccore,ppc601,ppc603,ppc604,ppc620")) 4 1) ; different machines have different compare timings @@ -227,6 +234,11 @@ (eq_attr "cpu" "ppc601,ppc602,ppc603,ppc604,ppc620")) 5 1) +(define_function_unit "fpu" 1 0 + (and (eq_attr "type" "fpcompare") + (eq_attr "cpu" "mpccore")) + 1 1) + (define_function_unit "bpu" 1 0 (and (eq_attr "type" "mtjmpr") (eq_attr "cpu" "rios1,rios2")) @@ -234,7 +246,7 @@ (define_function_unit "bpu" 1 0 (and (eq_attr "type" "mtjmpr") - (eq_attr "cpu" "ppc403,ppc601,ppc602,ppc603,ppc604,ppc620")) + (eq_attr "cpu" "ppc403,mpccore,ppc601,ppc602,ppc603,ppc604,ppc620")) 4 0) ; all jumps/branches are executing on the bpu, in 1 cycle, for all machines. @@ -246,12 +258,17 @@ (eq_attr "type" "branch") 1 0) -; Floating Point Unit (RIOS1, PPC601, PPC603, PPC604). +; Floating Point Unit (define_function_unit "fpu" 1 0 (and (eq_attr "type" "fp,dmul") (eq_attr "cpu" "rios1")) 2 0) +(define_function_unit "fpu" 1 0 + (and (eq_attr "type" "fp") + (eq_attr "cpu" "mpccore")) + 4 4) + (define_function_unit "fpu" 1 0 (and (eq_attr "type" "fp") (eq_attr "cpu" "ppc601")) @@ -262,6 +279,11 @@ (eq_attr "cpu" "ppc602,ppc603,ppc604,ppc620")) 3 1) +(define_function_unit "fpu" 1 0 + (and (eq_attr "type" "dmul") + (eq_attr "cpu" "mpccore")) + 5 5) + (define_function_unit "fpu" 1 0 (and (eq_attr "type" "dmul") (eq_attr "cpu" "ppc601")) @@ -288,11 +310,21 @@ (eq_attr "cpu" "ppc601")) 17 17) +(define_function_unit "fpu" 1 0 + (and (eq_attr "type" "sdiv") + (eq_attr "cpu" "mpccore")) + 10 10) + (define_function_unit "fpu" 1 0 (and (eq_attr "type" "sdiv") (eq_attr "cpu" "ppc602,ppc603,ppc604,ppc620")) 18 18) +(define_function_unit "fpu" 1 0 + (and (eq_attr "type" "ddiv") + (eq_attr "cpu" "mpccore")) + 17 17) + (define_function_unit "fpu" 1 0 (and (eq_attr "type" "ddiv") (eq_attr "cpu" "ppc601,ppc604,ppc620")) @@ -1536,8 +1568,7 @@ (lshiftrt:DI (mult:DI (sign_extend:DI (reg:SI 3)) (sign_extend:DI (reg:SI 4))) (const_int 32)))) - (clobber (match_scratch:SI 0 "=l")) - (clobber (reg:SI 4))] + (clobber (match_scratch:SI 0 "=l"))] "! TARGET_POWER && ! TARGET_POWERPC" "bla __mulh") @@ -1575,9 +1606,7 @@ (define_insn "quoss_call" [(set (reg:SI 3) (div:SI (reg:SI 3) (reg:SI 4))) - (clobber (match_scratch:SI 0 "=l")) - (clobber (match_scratch:CC 1 "=x")) - (clobber (reg:CC 69))] + (clobber (match_scratch:SI 0 "=l"))] "! TARGET_POWER && ! TARGET_POWERPC" "bla __quoss") @@ -2929,7 +2958,7 @@ (match_operand:SF 3 "gpc_reg_operand" "f")))] "! TARGET_POWERPC && TARGET_HARD_FLOAT" "{fma|fmadd} %0,%1,%2,%3" - [(set_attr "type" "fp")]) + [(set_attr "type" "dmul")]) (define_insn "" [(set (match_operand:SF 0 "gpc_reg_operand" "=f") @@ -2947,7 +2976,7 @@ (match_operand:SF 3 "gpc_reg_operand" "f")))] "! TARGET_POWERPC && TARGET_HARD_FLOAT" "{fms|fmsub} %0,%1,%2,%3" - [(set_attr "type" "fp")]) + [(set_attr "type" "dmul")]) (define_insn "" [(set (match_operand:SF 0 "gpc_reg_operand" "=f") @@ -2965,7 +2994,7 @@ (match_operand:SF 3 "gpc_reg_operand" "f"))))] "! TARGET_POWERPC && TARGET_HARD_FLOAT" "{fnma|fnmadd} %0,%1,%2,%3" - [(set_attr "type" "fp")]) + [(set_attr "type" "dmul")]) (define_insn "" [(set (match_operand:SF 0 "gpc_reg_operand" "=f") @@ -2983,7 +3012,7 @@ (match_operand:SF 3 "gpc_reg_operand" "f"))))] "! TARGET_POWERPC && TARGET_HARD_FLOAT" "{fnms|fnmsub} %0,%1,%2,%3" - [(set_attr "type" "fp")]) + [(set_attr "type" "dmul")]) (define_expand "sqrtsf2" [(set (match_operand:SF 0 "gpc_reg_operand" "") @@ -3691,14 +3720,18 @@ { if (! TARGET_POWER && ! TARGET_POWERPC) { - int endian = (WORDS_BIG_ENDIAN == 0); emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]); emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]); emit_insn (gen_mull_call ()); - emit_move_insn (operand_subword (operands[0], endian, 0, DImode), - gen_rtx (REG, SImode, 3)); - emit_move_insn (operand_subword (operands[0], 1 - endian, 0, DImode), - gen_rtx (REG, SImode, 4)); + if (WORDS_BIG_ENDIAN) + emit_move_insn (operands[0], gen_rtx (REG, DImode, 3)); + else + { + emit_move_insn (operand_subword (operands[0], 0, 0, DImode), + gen_rtx (REG, SImode, 3)); + emit_move_insn (operand_subword (operands[0], 1, 0, DImode), + gen_rtx (REG, SImode, 4)); + } DONE; } else if (TARGET_POWER) @@ -3736,7 +3769,7 @@ [(set (match_operand:DI 0 "gpc_reg_operand" "") (mult:DI (sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" "")) (sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" ""))))] - "TARGET_POWERPC && ! TARGET_POWERPC64" + "TARGET_POWERPC && ! TARGET_POWERPC64 && reload_completed" [(set (match_dup 3) (truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1)) @@ -3770,7 +3803,7 @@ [(set (match_operand:DI 0 "gpc_reg_operand" "") (mult:DI (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" "")) (zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" ""))))] - "TARGET_POWERPC && ! TARGET_POWERPC64" + "TARGET_POWERPC && ! TARGET_POWERPC64 && reload_completed" [(set (match_dup 3) (truncate:SI (lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1)) diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h index bc73a4c2f4b..586c3592532 100644 --- a/gcc/config/rs6000/sysv4.h +++ b/gcc/config/rs6000/sysv4.h @@ -1,5 +1,5 @@ /* Target definitions for GNU compiler for PowerPC running System V.4 - Copyright (C) 1995, Free Software Foundation, Inc. + Copyright (C) 1995, 1996 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -444,12 +444,15 @@ extern int rs6000_pic_labelno; %{mcpu=rsc: -mpwr} \ %{mcpu=rsc1: -mpwr} \ %{mcpu=403: -mppc} \ +%{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ %{mcpu=603: -mppc} \ %{mcpu=603e: -mppc} \ %{mcpu=604: -mppc} \ %{mcpu=620: -mppc} \ +%{mcpu=821: -mppc} \ +%{mcpu=860: -mppc} \ %{V} %{v:%{!V:-V}} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \ %{mrelocatable} %{mrelocatable-lib} %{memb} \ %{mlittle} %{mlittle-endian} %{mbig} %{mbig-endian}" @@ -632,12 +635,15 @@ do { \ %{mcpu=rsc: -D_ARCH_PWR} \ %{mcpu=rsc1: -D_ARCH_PWR} \ %{mcpu=403: -D_ARCH_PPC} \ +%{mcpu=505: -D_ARCH_PPC} \ %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ %{mcpu=602: -D_ARCH_PPC} \ %{mcpu=603: -D_ARCH_PPC} \ %{mcpu=603e: -D_ARCH_PPC} \ %{mcpu=604: -D_ARCH_PPC} \ -%{mcpu=620: -D_ARCH_PPC}" +%{mcpu=620: -D_ARCH_PPC} \ +%{mcpu=821: -D_ARCH_PPC} \ +%{mcpu=860: -D_ARCH_PPC}" /* Define this macro as a C expression for the initializer of an array of string to tell the driver program which options are