From: Rhys Perry Date: Fri, 13 Mar 2020 16:38:41 +0000 (+0000) Subject: radv: call nir_shader_gather_info again X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cf62c2b2ac69637785f55b790fdd601c17e7e9d5;p=mesa.git radv: call nir_shader_gather_info again pipeline-db (Navi, ACO): Totals from affected shaders: SGPRS: 11840 -> 11840 (0.00 %) VGPRS: 19012 -> 19124 (0.59 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 3696 -> 3696 (0.00 %) dwords per thread Code Size: 998680 -> 921388 (-7.74 %) bytes LDS: 19646 -> 19646 (0.00 %) blocks Max Waves: 3398 -> 3401 (0.09 %) pipeline-db (Navi, LLVM): Totals from affected shaders: SGPRS: 17016 -> 17128 (0.66 %) VGPRS: 19564 -> 14876 (-23.96 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 3872 -> 3872 (0.00 %) dwords per thread Code Size: 820416 -> 743576 (-9.37 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 3367 -> 3534 (4.96 %) Signed-off-by: Rhys Perry Reviewed-By: Timur Kristóf Reviewed-by: Samuel Pitoiset Tested-by: Marge Bot Part-of: --- diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 01db4c93e17..f414437e2a3 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2846,6 +2846,9 @@ void radv_create_shaders(struct radv_pipeline *pipeline, for (int i = 0; i < MESA_SHADER_STAGES; ++i) { if (nir[i]) { + /* do this again since information such as outputs_read can be out-of-date */ + nir_shader_gather_info(nir[i], nir_shader_get_entrypoint(nir[i])); + if (device->physical_device->use_aco) { NIR_PASS_V(nir[i], nir_lower_non_uniform_access, nir_lower_non_uniform_ubo_access |