From: Mike Frysinger Date: Mon, 2 Jan 2023 02:31:01 +0000 (-0500) Subject: sim: m32r: hoist cgen rules to top-level X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cf764309dc62076148eda5be342e27c22330157b;p=binutils-gdb.git sim: m32r: hoist cgen rules to top-level --- diff --git a/sim/Makefile.in b/sim/Makefile.in index a063b0cac94..e420ef1b87c 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -3705,6 +3705,24 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@ +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2 + +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch: +@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH) +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch + +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode: +@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode + +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x: +@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x + +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2: +@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) +@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2 + # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp) @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in index e935df33017..644d8de7dd1 100644 --- a/sim/m32r/Makefile.in +++ b/sim/m32r/Makefile.in @@ -35,55 +35,7 @@ SIM_OBJS = \ $(M32R2_OBJS) \ traps.o -SIM_EXTRA_CLEAN = m32r-clean - # Some modules don't build cleanly yet. cpu.o cpu2.o cpux.o m32r.o m32r2.o m32rx.o mloop.o mloop2.o mloopx.o sem.o sim-if.o traps.o: SIM_WERROR_CFLAGS = ## COMMON_POST_CONFIG_FRAG - -m32r-clean: - rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu - rm -f tmp-* - -# NOTE: Generated source files are specified as full paths, -# e.g. $(srcdir)/arch.c, because make may decide the files live -# in objdir otherwise. - -stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile - $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ - archfile=$(CPU_DIR)/m32r.cpu \ - FLAGS="with-scache with-profile=fn" - $(SILENCE) touch $@ -$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch - @true - -stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=m32rbf mach=m32r SUFFIX= \ - archfile=$(CPU_DIR)/m32r.cpu \ - FLAGS="with-scache with-profile=fn" \ - EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - $(SILENCE) touch $@ -$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu - @true - -stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=m32rxf mach=m32rx SUFFIX=x \ - archfile=$(CPU_DIR)/m32r.cpu \ - FLAGS="with-scache with-profile=fn" \ - EXTRAFILES="$(CGEN_CPU_SEMSW)" - $(SILENCE) touch $@ -$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu - @true - -stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=m32r2f mach=m32r2 SUFFIX=2 \ - archfile=$(CPU_DIR)/m32r.cpu \ - FLAGS="with-scache with-profile=fn" \ - EXTRAFILES="$(CGEN_CPU_SEMSW)" - $(SILENCE) touch $@ -$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu - @true diff --git a/sim/m32r/local.mk b/sim/m32r/local.mk index 15585cd5253..a5e5d8829a5 100644 --- a/sim/m32r/local.mk +++ b/sim/m32r/local.mk @@ -75,3 +75,22 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS) $(AM_V_at)touch $@ MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS) + +## Target that triggers all cgen targets that works when --disable-cgen-maint. +%D%/cgen: %D%/cgen-arch %D%/cgen-cpu-decode %D%/cgen-cpu-decode-x %D%/cgen-cpu-decode-2 + +%D%/cgen-arch: + $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH) +%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch + +%D%/cgen-cpu-decode: + $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) +%D%/cpu.h %D%/sem.c %D%/sem-switch.c %D%/model.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode + +%D%/cgen-cpu-decode-x: + $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) +%D%/cpux.h %D%/semx-switch.c %D%/modelx.c %D%/decodex.c %D%/decodex.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-x + +%D%/cgen-cpu-decode-2: + $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) +%D%/cpu2.h %D%/sem2-switch.c %D%/model2.c %D%/decode2.c %D%/decode2.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-2