From: Marek Olšák Date: Sun, 6 Dec 2015 23:00:59 +0000 (+0100) Subject: gallium/radeon: remove radeon_winsys_cs_handle X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cf811faeff1eaa1aef817ae45314cc3419c44222;p=mesa.git gallium/radeon: remove radeon_winsys_cs_handle "radeon_winsys_cs_handle *cs_buf" is now equivalent to "pb_buffer *buf". Reviewed-by: Nicolai Hähnle Reviewed-by: Edward O'Callaghan Reviewed-by: Michel Dänzer --- diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index f298d88004b..5c443d144ba 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -295,7 +295,6 @@ struct r300_query { /* The buffer where query results are stored. */ struct pb_buffer *buf; - struct radeon_winsys_cs_handle *cs_buf; }; struct r300_surface { @@ -303,7 +302,6 @@ struct r300_surface { /* Winsys buffer backing the texture. */ struct pb_buffer *buf; - struct radeon_winsys_cs_handle *cs_buf; enum radeon_bo_domain domain; @@ -395,7 +393,6 @@ struct r300_resource /* Winsys buffer backing this resource. */ struct pb_buffer *buf; - struct radeon_winsys_cs_handle *cs_buf; enum radeon_bo_domain domain; /* Constant buffers and SWTCL vertex and index buffers are in user @@ -460,7 +457,6 @@ struct r300_context { struct draw_context* draw; /* Vertex buffer for SW TCL. */ struct pb_buffer *vbo; - struct radeon_winsys_cs_handle *vbo_cs; /* Offset and size into the SW TCL VBO. */ size_t draw_vbo_offset; diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index a2d042ca48e..7ae83a8920b 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -108,9 +108,9 @@ #define OUT_CS_RELOC(r) do { \ assert((r)); \ - assert((r)->cs_buf); \ + assert((r)->buf); \ OUT_CS(0xc0001000); /* PKT3_NOP */ \ - OUT_CS(cs_winsys->cs_lookup_buffer(cs_copy, (r)->cs_buf) * 4); \ + OUT_CS(cs_winsys->cs_lookup_buffer(cs_copy, (r)->buf) * 4); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index 7610c3ddf5b..9eb9c1755c2 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -1047,9 +1047,9 @@ void r300_emit_vertex_arrays_swtcl(struct r300_context *r300, boolean indexed) OUT_CS(r300->draw_vbo_offset); OUT_CS(0); - assert(r300->vbo_cs); + assert(r300->vbo); OUT_CS(0xc0001000); /* PKT3_NOP */ - OUT_CS(r300->rws->cs_lookup_buffer(r300->cs, r300->vbo_cs) * 4); + OUT_CS(r300->rws->cs_lookup_buffer(r300->cs, r300->vbo) * 4); END_CS; } @@ -1320,7 +1320,7 @@ validate: continue; tex = r300_resource(fb->cbufs[i]->texture); assert(tex && tex->buf && "cbuf is marked, but NULL!"); - r300->rws->cs_add_buffer(r300->cs, tex->cs_buf, + r300->rws->cs_add_buffer(r300->cs, tex->buf, RADEON_USAGE_READWRITE, r300_surface(fb->cbufs[i])->domain, tex->b.b.nr_samples > 1 ? @@ -1331,7 +1331,7 @@ validate: if (fb->zsbuf) { tex = r300_resource(fb->zsbuf->texture); assert(tex && tex->buf && "zsbuf is marked, but NULL!"); - r300->rws->cs_add_buffer(r300->cs, tex->cs_buf, + r300->rws->cs_add_buffer(r300->cs, tex->buf, RADEON_USAGE_READWRITE, r300_surface(fb->zsbuf)->domain, tex->b.b.nr_samples > 1 ? @@ -1342,7 +1342,7 @@ validate: /* The AA resolve buffer. */ if (r300->aa_state.dirty) { if (aa->dest) { - r300->rws->cs_add_buffer(r300->cs, aa->dest->cs_buf, + r300->rws->cs_add_buffer(r300->cs, aa->dest->buf, RADEON_USAGE_WRITE, aa->dest->domain, RADEON_PRIO_COLOR_BUFFER); @@ -1356,18 +1356,18 @@ validate: } tex = r300_resource(texstate->sampler_views[i]->base.texture); - r300->rws->cs_add_buffer(r300->cs, tex->cs_buf, RADEON_USAGE_READ, + r300->rws->cs_add_buffer(r300->cs, tex->buf, RADEON_USAGE_READ, tex->domain, RADEON_PRIO_SAMPLER_TEXTURE); } } /* ...occlusion query buffer... */ if (r300->query_current) - r300->rws->cs_add_buffer(r300->cs, r300->query_current->cs_buf, + r300->rws->cs_add_buffer(r300->cs, r300->query_current->buf, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT, RADEON_PRIO_QUERY); /* ...vertex buffer for SWTCL path... */ - if (r300->vbo_cs) - r300->rws->cs_add_buffer(r300->cs, r300->vbo_cs, + if (r300->vbo) + r300->rws->cs_add_buffer(r300->cs, r300->vbo, RADEON_USAGE_READ, RADEON_DOMAIN_GTT, RADEON_PRIO_VERTEX_BUFFER); /* ...vertex buffers for HWTCL path... */ @@ -1382,7 +1382,7 @@ validate: if (!buf) continue; - r300->rws->cs_add_buffer(r300->cs, r300_resource(buf)->cs_buf, + r300->rws->cs_add_buffer(r300->cs, r300_resource(buf)->buf, RADEON_USAGE_READ, r300_resource(buf)->domain, RADEON_PRIO_SAMPLER_BUFFER); @@ -1390,7 +1390,7 @@ validate: } /* ...and index buffer for HWTCL path. */ if (index_buffer) - r300->rws->cs_add_buffer(r300->cs, r300_resource(index_buffer)->cs_buf, + r300->rws->cs_add_buffer(r300->cs, r300_resource(index_buffer)->buf, RADEON_USAGE_READ, r300_resource(index_buffer)->domain, RADEON_PRIO_INDEX_BUFFER); diff --git a/src/gallium/drivers/r300/r300_query.c b/src/gallium/drivers/r300/r300_query.c index 4dd8156f616..6414e80828e 100644 --- a/src/gallium/drivers/r300/r300_query.c +++ b/src/gallium/drivers/r300/r300_query.c @@ -64,8 +64,6 @@ static struct pipe_query *r300_create_query(struct pipe_context *pipe, FREE(q); return NULL; } - q->cs_buf = r300->rws->buffer_get_cs_handle(q->buf); - return (struct pipe_query*)q; } @@ -155,7 +153,7 @@ static boolean r300_get_query_result(struct pipe_context* pipe, return vresult->b; } - map = r300->rws->buffer_map(q->cs_buf, r300->cs, + map = r300->rws->buffer_map(q->buf, r300->cs, PIPE_TRANSFER_READ | (!wait ? PIPE_TRANSFER_DONTBLOCK : 0)); if (!map) diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index 0487b11e775..b482fa140ed 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -373,7 +373,7 @@ static void r300_draw_arrays_immediate(struct r300_context *r300, /* Map the buffer. */ if (!map[vbi]) { map[vbi] = (uint32_t*)r300->rws->buffer_map( - r300_resource(vbuf->buffer)->cs_buf, + r300_resource(vbuf->buffer)->buf, r300->cs, PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED); map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * info->start; } @@ -606,7 +606,7 @@ static void r300_draw_elements(struct r300_context *r300, /* Fallback for misaligned ushort indices. */ if (indexSize == 2 && (start & 1) && indexBuffer) { /* If we got here, then orgIndexBuffer == indexBuffer. */ - uint16_t *ptr = r300->rws->buffer_map(r300_resource(orgIndexBuffer)->cs_buf, + uint16_t *ptr = r300->rws->buffer_map(r300_resource(orgIndexBuffer)->buf, r300->cs, PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED); @@ -899,7 +899,7 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render, if (!r300->vbo || size + r300->draw_vbo_offset > r300->vbo->size) { pb_reference(&r300->vbo, NULL); - r300->vbo_cs = NULL; + r300->vbo = NULL; r300render->vbo_ptr = NULL; r300->vbo = rws->buffer_create(rws, @@ -909,9 +909,8 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render, if (!r300->vbo) { return FALSE; } - r300->vbo_cs = rws->buffer_get_cs_handle(r300->vbo); r300->draw_vbo_offset = 0; - r300render->vbo_ptr = rws->buffer_map(r300->vbo_cs, r300->cs, + r300render->vbo_ptr = rws->buffer_map(r300->vbo, r300->cs, PIPE_TRANSFER_WRITE); } diff --git a/src/gallium/drivers/r300/r300_screen_buffer.c b/src/gallium/drivers/r300/r300_screen_buffer.c index e9395738d52..737a6f5e4f8 100644 --- a/src/gallium/drivers/r300/r300_screen_buffer.c +++ b/src/gallium/drivers/r300/r300_screen_buffer.c @@ -95,7 +95,7 @@ r300_buffer_transfer_map( struct pipe_context *context, assert(usage & PIPE_TRANSFER_WRITE); /* Check if mapping this buffer would cause waiting for the GPU. */ - if (r300->rws->cs_is_buffer_referenced(r300->cs, rbuf->cs_buf, RADEON_USAGE_READWRITE) || + if (r300->rws->cs_is_buffer_referenced(r300->cs, rbuf->buf, RADEON_USAGE_READWRITE) || !r300->rws->buffer_wait(rbuf->buf, 0, RADEON_USAGE_READWRITE)) { unsigned i; struct pb_buffer *new_buf; @@ -108,7 +108,6 @@ r300_buffer_transfer_map( struct pipe_context *context, /* Discard the old buffer. */ pb_reference(&rbuf->buf, NULL); rbuf->buf = new_buf; - rbuf->cs_buf = r300->rws->buffer_get_cs_handle(rbuf->buf); /* We changed the buffer, now we need to bind it where the old one was bound. */ for (i = 0; i < r300->nr_vertex_buffers; i++) { @@ -127,7 +126,7 @@ r300_buffer_transfer_map( struct pipe_context *context, usage |= PIPE_TRANSFER_UNSYNCHRONIZED; } - map = rws->buffer_map(rbuf->cs_buf, r300->cs, usage); + map = rws->buffer_map(rbuf->buf, r300->cs, usage); if (!map) { util_slab_free(&r300->pool_transfers, transfer); @@ -190,9 +189,5 @@ struct pipe_resource *r300_buffer_create(struct pipe_screen *screen, FREE(rbuf); return NULL; } - - rbuf->cs_buf = - r300screen->rws->buffer_get_cs_handle(rbuf->buf); - return &rbuf->b.b; } diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index 5e4d50df27d..e90e741a353 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -1059,8 +1059,6 @@ r300_texture_create_object(struct r300_screen *rscreen, util_format_is_depth_or_stencil(base->format) ? "depth" : "color"); } - tex->cs_buf = rws->buffer_get_cs_handle(tex->buf); - rws->buffer_set_tiling(tex->buf, NULL, tex->tex.microtile, tex->tex.macrotile[0], 0, 0, 0, 0, 0, 0, 0, @@ -1169,7 +1167,7 @@ struct pipe_surface* r300_create_surface_custom(struct pipe_context * ctx, surface->base.u.tex.last_layer = surf_tmpl->u.tex.last_layer; surface->buf = tex->buf; - surface->cs_buf = tex->cs_buf; + surface->buf = tex->buf; /* Prefer VRAM if there are multiple domains to choose from. */ surface->domain = tex->domain; diff --git a/src/gallium/drivers/r300/r300_transfer.c b/src/gallium/drivers/r300/r300_transfer.c index 44303792f51..842e70a6899 100644 --- a/src/gallium/drivers/r300/r300_transfer.c +++ b/src/gallium/drivers/r300/r300_transfer.c @@ -115,7 +115,7 @@ r300_texture_transfer_map(struct pipe_context *ctx, char *map; referenced_cs = - r300->rws->cs_is_buffer_referenced(r300->cs, tex->cs_buf, RADEON_USAGE_READWRITE); + r300->rws->cs_is_buffer_referenced(r300->cs, tex->buf, RADEON_USAGE_READWRITE); if (referenced_cs) { referenced_hw = TRUE; } else { @@ -218,7 +218,7 @@ r300_texture_transfer_map(struct pipe_context *ctx, if (trans->linear_texture) { /* The detiled texture is of the same size as the region being mapped * (no offset needed). */ - map = r300->rws->buffer_map(trans->linear_texture->cs_buf, + map = r300->rws->buffer_map(trans->linear_texture->buf, r300->cs, usage); if (!map) { pipe_resource_reference( @@ -230,7 +230,7 @@ r300_texture_transfer_map(struct pipe_context *ctx, return map; } else { /* Tiling is disabled. */ - map = r300->rws->buffer_map(tex->cs_buf, r300->cs, usage); + map = r300->rws->buffer_map(tex->buf, r300->cs, usage); if (!map) { FREE(trans); return NULL; diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index ef6de8c98d1..d83eb17c280 100644 --- a/src/gallium/drivers/r600/evergreen_compute.c +++ b/src/gallium/drivers/r600/evergreen_compute.c @@ -233,7 +233,7 @@ void *evergreen_create_compute_state( shader->bc.ndw * 4); p = r600_buffer_map_sync_with_rings(&ctx->b, shader->code_bo, PIPE_TRANSFER_WRITE); memcpy(p, shader->bc.bytecode, shader->bc.ndw * 4); - ctx->b.ws->buffer_unmap(shader->code_bo->cs_buf); + ctx->b.ws->buffer_unmap(shader->code_bo->buf); #endif #endif @@ -613,7 +613,7 @@ static void evergreen_launch_grid( kernel->bc.ndw * 4); p = r600_buffer_map_sync_with_rings(&ctx->b, kernel->code_bo, PIPE_TRANSFER_WRITE); memcpy(p, kernel->bc.bytecode, kernel->bc.ndw * 4); - ctx->b.ws->buffer_unmap(kernel->code_bo->cs_buf); + ctx->b.ws->buffer_unmap(kernel->code_bo->buf); } shader->active_kernel = kernel; ctx->cs_shader_state.kernel_index = pc; diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index 77bd768356d..2ba6003637e 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -2633,7 +2633,7 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx, } else { memcpy(bytecode, bc.bytecode, fs_size); } - rctx->b.ws->buffer_unmap(shader->buffer->cs_buf); + rctx->b.ws->buffer_unmap(shader->buffer->buf); r600_bytecode_clear(&bc); return shader; diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index 8a08dbdd82a..c52d5a9bad0 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -533,7 +533,7 @@ static void r600_copy_buffer(struct pipe_context *ctx, struct pipe_resource *dst /** * Global buffers are not really resources, they are are actually offsets * into a single global resource (r600_screen::global_pool). The means - * they don't have their own cs_buf handle, so they cannot be passed + * they don't have their own buf handle, so they cannot be passed * to r600_copy_buffer() and must be handled separately. */ static void r600_copy_global_buffer(struct pipe_context *ctx, diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index ba5d9be2e37..17006f70601 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -184,7 +184,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, rctx->b.gfx.cs = ws->cs_create(rctx->b.ctx, RING_GFX, r600_context_gfx_flush, rctx, rscreen->b.trace_bo ? - rscreen->b.trace_bo->cs_buf : NULL); + rscreen->b.trace_bo->buf : NULL); rctx->b.gfx.flush = r600_context_gfx_flush; rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024, 256, @@ -663,7 +663,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws) templ.usage = PIPE_USAGE_DEFAULT; struct r600_resource *res = r600_resource(rscreen->screen.resource_create(&rscreen->screen, &templ)); - unsigned char *map = ws->buffer_map(res->cs_buf, NULL, PIPE_TRANSFER_WRITE); + unsigned char *map = ws->buffer_map(res->buf, NULL, PIPE_TRANSFER_WRITE); memset(map, 0, 256); diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index cd231005d40..d411b0be50e 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -149,7 +149,7 @@ static int store_shader(struct pipe_context *ctx, } else { memcpy(ptr, shader->shader.bc.bytecode, shader->shader.bc.ndw * sizeof(*ptr)); } - rctx->b.ws->buffer_unmap(shader->bo->cs_buf); + rctx->b.ws->buffer_unmap(shader->bo->buf); } return 0; diff --git a/src/gallium/drivers/r600/r600_uvd.c b/src/gallium/drivers/r600/r600_uvd.c index e2e9033ea2c..18d2b69afb0 100644 --- a/src/gallium/drivers/r600/r600_uvd.c +++ b/src/gallium/drivers/r600/r600_uvd.c @@ -121,11 +121,9 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe, if (!resources[i]) continue; - /* recreate the CS handle */ - resources[i]->resource.cs_buf = ctx->b.ws->buffer_get_cs_handle( - resources[i]->resource.buf); + /* reset the address */ resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address( - resources[i]->resource.cs_buf); + resources[i]->resource.buf); } template.height *= array_size; @@ -155,7 +153,7 @@ static uint32_t eg_num_banks(uint32_t nbanks) } /* set the decoding target buffer offsets */ -static struct radeon_winsys_cs_handle* r600_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf) +static struct pb_buffer* r600_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf) { struct r600_screen *rscreen = (struct r600_screen*)buf->base.context->screen; struct r600_texture *luma = (struct r600_texture *)buf->resources[0]; @@ -166,18 +164,18 @@ static struct radeon_winsys_cs_handle* r600_uvd_set_dtb(struct ruvd_msg *msg, st ruvd_set_dt_surfaces(msg, &luma->surface, &chroma->surface); - return luma->resource.cs_buf; + return luma->resource.buf; } /* get the radeon resources for VCE */ static void r600_vce_get_buffer(struct pipe_resource *resource, - struct radeon_winsys_cs_handle **handle, + struct pb_buffer **handle, struct radeon_surf **surface) { struct r600_texture *res = (struct r600_texture *)resource; if (handle) - *handle = res->resource.cs_buf; + *handle = res->resource.buf; if (surface) *surface = &res->surface; diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c index c294e516408..18925277d2d 100644 --- a/src/gallium/drivers/radeon/r600_buffer_common.c +++ b/src/gallium/drivers/radeon/r600_buffer_common.c @@ -31,7 +31,7 @@ #include boolean r600_rings_is_buffer_referenced(struct r600_common_context *ctx, - struct radeon_winsys_cs_handle *buf, + struct pb_buffer *buf, enum radeon_bo_usage usage) { if (ctx->ws->cs_is_buffer_referenced(ctx->gfx.cs, buf, usage)) { @@ -52,7 +52,7 @@ void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx, bool busy = false; if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) { - return ctx->ws->buffer_map(resource->cs_buf, NULL, usage); + return ctx->ws->buffer_map(resource->buf, NULL, usage); } if (!(usage & PIPE_TRANSFER_WRITE)) { @@ -62,7 +62,7 @@ void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx, if (ctx->gfx.cs->cdw != ctx->initial_gfx_cs_size && ctx->ws->cs_is_buffer_referenced(ctx->gfx.cs, - resource->cs_buf, rusage)) { + resource->buf, rusage)) { if (usage & PIPE_TRANSFER_DONTBLOCK) { ctx->gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL); return NULL; @@ -74,7 +74,7 @@ void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx, if (ctx->dma.cs && ctx->dma.cs->cdw && ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, - resource->cs_buf, rusage)) { + resource->buf, rusage)) { if (usage & PIPE_TRANSFER_DONTBLOCK) { ctx->dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL); return NULL; @@ -97,7 +97,7 @@ void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx, } /* Setting the CS to NULL will prevent doing checks we have done already. */ - return ctx->ws->buffer_map(resource->cs_buf, NULL, usage); + return ctx->ws->buffer_map(resource->buf, NULL, usage); } bool r600_init_resource(struct r600_common_screen *rscreen, @@ -179,11 +179,10 @@ bool r600_init_resource(struct r600_common_screen *rscreen, * the same buffer where one of the contexts invalidates it while * the others are using it. */ old_buf = res->buf; - res->cs_buf = rscreen->ws->buffer_get_cs_handle(new_buf); /* should be atomic */ res->buf = new_buf; /* should be atomic */ if (rscreen->info.r600_virtual_address) - res->gpu_address = rscreen->ws->buffer_get_virtual_address(res->cs_buf); + res->gpu_address = rscreen->ws->buffer_get_virtual_address(res->buf); else res->gpu_address = 0; @@ -278,7 +277,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx, assert(usage & PIPE_TRANSFER_WRITE); /* Check if mapping this buffer would cause waiting for the GPU. */ - if (r600_rings_is_buffer_referenced(rctx, rbuffer->cs_buf, RADEON_USAGE_READWRITE) || + if (r600_rings_is_buffer_referenced(rctx, rbuffer->buf, RADEON_USAGE_READWRITE) || !rctx->ws->buffer_wait(rbuffer->buf, 0, RADEON_USAGE_READWRITE)) { rctx->invalidate_buffer(&rctx->b, &rbuffer->b.b); } @@ -292,7 +291,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx, assert(usage & PIPE_TRANSFER_WRITE); /* Check if mapping this buffer would cause waiting for the GPU. */ - if (r600_rings_is_buffer_referenced(rctx, rbuffer->cs_buf, RADEON_USAGE_READWRITE) || + if (r600_rings_is_buffer_referenced(rctx, rbuffer->buf, RADEON_USAGE_READWRITE) || !rctx->ws->buffer_wait(rbuffer->buf, 0, RADEON_USAGE_READWRITE)) { /* Do a wait-free write-only transfer using a temporary buffer. */ unsigned offset; @@ -483,11 +482,9 @@ r600_buffer_from_user_memory(struct pipe_screen *screen, return NULL; } - rbuffer->cs_buf = ws->buffer_get_cs_handle(rbuffer->buf); - if (rscreen->info.r600_virtual_address) rbuffer->gpu_address = - ws->buffer_get_virtual_address(rbuffer->cs_buf); + ws->buffer_get_virtual_address(rbuffer->buf); else rbuffer->gpu_address = 0; diff --git a/src/gallium/drivers/radeon/r600_cs.h b/src/gallium/drivers/radeon/r600_cs.h index ad067ce4e76..caf7deef37c 100644 --- a/src/gallium/drivers/radeon/r600_cs.h +++ b/src/gallium/drivers/radeon/r600_cs.h @@ -50,7 +50,7 @@ static inline unsigned radeon_add_to_buffer_list(struct r600_common_context *rct enum radeon_bo_priority priority) { assert(usage); - return rctx->ws->cs_add_buffer(ring->cs, rbo->cs_buf, usage, + return rctx->ws->cs_add_buffer(ring->cs, rbo->buf, usage, rbo->domains, priority) * 4; } diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index ba541acfd75..9a5e9878176 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -948,7 +948,7 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen, PIPE_USAGE_STAGING, 4096); if (rscreen->trace_bo) { - rscreen->trace_ptr = rscreen->ws->buffer_map(rscreen->trace_bo->cs_buf, NULL, + rscreen->trace_ptr = rscreen->ws->buffer_map(rscreen->trace_bo->buf, NULL, PIPE_TRANSFER_UNSYNCHRONIZED); } } diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 8fbbe88c62b..c3933b1da98 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -134,7 +134,6 @@ struct r600_resource { /* Winsys objects. */ struct pb_buffer *buf; - struct radeon_winsys_cs_handle *cs_buf; uint64_t gpu_address; /* Resource state. */ @@ -478,7 +477,7 @@ struct r600_common_context { /* r600_buffer.c */ boolean r600_rings_is_buffer_referenced(struct r600_common_context *ctx, - struct radeon_winsys_cs_handle *buf, + struct pb_buffer *buf, enum radeon_bo_usage usage); void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx, struct r600_resource *resource, diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c index 06b5e501a50..ed0aefc9d32 100644 --- a/src/gallium/drivers/radeon/r600_query.c +++ b/src/gallium/drivers/radeon/r600_query.c @@ -253,7 +253,7 @@ static void r600_query_hw_prepare_buffer(struct r600_common_context *ctx, struct r600_resource *buffer) { /* Callers ensure that the buffer is currently unused by the GPU. */ - uint32_t *results = ctx->ws->buffer_map(buffer->cs_buf, NULL, + uint32_t *results = ctx->ws->buffer_map(buffer->buf, NULL, PIPE_TRANSFER_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED); @@ -667,7 +667,7 @@ static void r600_query_hw_reset_buffers(struct r600_common_context *rctx, if (query->flags & R600_QUERY_HW_FLAG_PREDICATE) { /* Obtain a new buffer if the current one can't be mapped without a stall. */ - if (r600_rings_is_buffer_referenced(rctx, query->buffer.buf->cs_buf, RADEON_USAGE_READWRITE) || + if (r600_rings_is_buffer_referenced(rctx, query->buffer.buf->buf, RADEON_USAGE_READWRITE) || !rctx->ws->buffer_wait(query->buffer.buf->buf, 0, RADEON_USAGE_READWRITE)) { pipe_resource_reference((struct pipe_resource**)&query->buffer.buf, NULL); query->buffer.buf = r600_new_query_buffer(rctx, query); diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index de2d1cb53b3..7c4717d29fa 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -754,9 +754,8 @@ r600_texture_create_object(struct pipe_screen *screen, } } else { resource->buf = buf; - resource->cs_buf = rscreen->ws->buffer_get_cs_handle(buf); - resource->gpu_address = rscreen->ws->buffer_get_virtual_address(resource->cs_buf); - resource->domains = rscreen->ws->buffer_get_initial_domain(resource->cs_buf); + resource->gpu_address = rscreen->ws->buffer_get_virtual_address(resource->buf); + resource->domains = rscreen->ws->buffer_get_initial_domain(resource->buf); } if (rtex->cmask.size) { @@ -1024,7 +1023,7 @@ static void *r600_texture_transfer_map(struct pipe_context *ctx, /* Untiled buffers in VRAM, which is slow for CPU reads */ use_staging_texture = TRUE; } else if (!(usage & PIPE_TRANSFER_READ) && - (r600_rings_is_buffer_referenced(rctx, rtex->resource.cs_buf, RADEON_USAGE_READWRITE) || + (r600_rings_is_buffer_referenced(rctx, rtex->resource.buf, RADEON_USAGE_READWRITE) || !rctx->ws->buffer_wait(rtex->resource.buf, 0, RADEON_USAGE_READWRITE))) { /* Use a staging texture for uploads if the underlying BO is busy. */ use_staging_texture = TRUE; diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c index 6ea07be72fe..1f5a16aaca6 100644 --- a/src/gallium/drivers/radeon/radeon_uvd.c +++ b/src/gallium/drivers/radeon/radeon_uvd.c @@ -105,16 +105,16 @@ static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val) /* send a command to the VCPU through the GPCOM registers */ static void send_cmd(struct ruvd_decoder *dec, unsigned cmd, - struct radeon_winsys_cs_handle* cs_buf, uint32_t off, + struct pb_buffer* buf, uint32_t off, enum radeon_bo_usage usage, enum radeon_bo_domain domain) { int reloc_idx; - reloc_idx = dec->ws->cs_add_buffer(dec->cs, cs_buf, usage, domain, + reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage, domain, RADEON_PRIO_UVD); if (!dec->use_legacy) { uint64_t addr; - addr = dec->ws->buffer_get_virtual_address(cs_buf); + addr = dec->ws->buffer_get_virtual_address(buf); addr = addr + off; set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr); set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32); @@ -142,7 +142,7 @@ static void map_msg_fb_it_buf(struct ruvd_decoder *dec) buf = &dec->msg_fb_it_buffers[dec->cur_buffer]; /* and map it for CPU access */ - ptr = dec->ws->buffer_map(buf->res->cs_buf, dec->cs, PIPE_TRANSFER_WRITE); + ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE); /* calc buffer offsets */ dec->msg = (struct ruvd_msg *)ptr; @@ -164,13 +164,13 @@ static void send_msg_buf(struct ruvd_decoder *dec) buf = &dec->msg_fb_it_buffers[dec->cur_buffer]; /* unmap the buffer */ - dec->ws->buffer_unmap(buf->res->cs_buf); + dec->ws->buffer_unmap(buf->res->buf); dec->msg = NULL; dec->fb = NULL; dec->it = NULL; /* and send it to the hardware */ - send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->cs_buf, 0, + send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT); } @@ -852,7 +852,7 @@ static void ruvd_begin_frame(struct pipe_video_codec *decoder, dec->bs_size = 0; dec->bs_ptr = dec->ws->buffer_map( - dec->bs_buffers[dec->cur_buffer].res->cs_buf, + dec->bs_buffers[dec->cur_buffer].res->buf, dec->cs, PIPE_TRANSFER_WRITE); } @@ -892,13 +892,13 @@ static void ruvd_decode_bitstream(struct pipe_video_codec *decoder, unsigned new_size = dec->bs_size + sizes[i]; if (new_size > buf->res->buf->size) { - dec->ws->buffer_unmap(buf->res->cs_buf); + dec->ws->buffer_unmap(buf->res->buf); if (!rvid_resize_buffer(dec->screen, dec->cs, buf, new_size)) { RVID_ERR("Can't resize bitstream buffer!"); return; } - dec->bs_ptr = dec->ws->buffer_map(buf->res->cs_buf, dec->cs, + dec->bs_ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE); if (!dec->bs_ptr) return; @@ -920,7 +920,7 @@ static void ruvd_end_frame(struct pipe_video_codec *decoder, struct pipe_picture_desc *picture) { struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder; - struct radeon_winsys_cs_handle *dt; + struct pb_buffer *dt; struct rvid_buffer *msg_fb_it_buf, *bs_buf; unsigned bs_size; @@ -934,7 +934,7 @@ static void ruvd_end_frame(struct pipe_video_codec *decoder, bs_size = align(dec->bs_size, 128); memset(dec->bs_ptr, 0, bs_size - dec->bs_size); - dec->ws->buffer_unmap(bs_buf->res->cs_buf); + dec->ws->buffer_unmap(bs_buf->res->buf); map_msg_fb_it_buf(dec); dec->msg->size = sizeof(*dec->msg); @@ -995,20 +995,20 @@ static void ruvd_end_frame(struct pipe_video_codec *decoder, send_msg_buf(dec); - send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->cs_buf, 0, + send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0, RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM); if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) { - send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->cs_buf, 0, + send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0, RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM); } - send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->cs_buf, + send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf, 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT); send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0, RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM); - send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->cs_buf, + send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf, FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT); if (have_it(dec)) - send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->cs_buf, + send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf, FB_BUFFER_OFFSET + FB_BUFFER_SIZE, RADEON_USAGE_READ, RADEON_DOMAIN_GTT); set_reg(dec, RUVD_ENGINE_CNTL, 1); diff --git a/src/gallium/drivers/radeon/radeon_uvd.h b/src/gallium/drivers/radeon/radeon_uvd.h index 88013bd5653..30738bf0e82 100644 --- a/src/gallium/drivers/radeon/radeon_uvd.h +++ b/src/gallium/drivers/radeon/radeon_uvd.h @@ -421,7 +421,7 @@ struct ruvd_msg { }; /* driver dependent callback */ -typedef struct radeon_winsys_cs_handle* (*ruvd_set_dtb) +typedef struct pb_buffer* (*ruvd_set_dtb) (struct ruvd_msg* msg, struct vl_video_buffer *vb); /* create an UVD decode */ diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index 8a60441c056..41603b32403 100644 --- a/src/gallium/drivers/radeon/radeon_vce.c +++ b/src/gallium/drivers/radeon/radeon_vce.c @@ -64,7 +64,7 @@ static void flush(struct rvce_encoder *enc) #if 0 static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb) { - uint32_t *ptr = enc->ws->buffer_map(fb->res->cs_buf, enc->cs, PIPE_TRANSFER_READ_WRITE); + uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, enc->cs, PIPE_TRANSFER_READ_WRITE); unsigned i = 0; fprintf(stderr, "\n"); fprintf(stderr, "encStatus:\t\t\t%08x\n", ptr[i++]); @@ -83,7 +83,7 @@ static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb) fprintf(stderr, "seiPrivatePackageOffset:\t%08x\n", ptr[i++]); fprintf(stderr, "seiPrivatePackageSize:\t\t%08x\n", ptr[i++]); fprintf(stderr, "\n"); - enc->ws->buffer_unmap(fb->res->cs_buf); + enc->ws->buffer_unmap(fb->res->buf); } #endif @@ -346,7 +346,7 @@ static void rvce_get_feedback(struct pipe_video_codec *encoder, struct rvid_buffer *fb = feedback; if (size) { - uint32_t *ptr = enc->ws->buffer_map(fb->res->cs_buf, enc->cs, PIPE_TRANSFER_READ_WRITE); + uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, enc->cs, PIPE_TRANSFER_READ_WRITE); if (ptr[1]) { *size = ptr[4] - ptr[9]; @@ -354,7 +354,7 @@ static void rvce_get_feedback(struct pipe_video_codec *encoder, *size = 0; } - enc->ws->buffer_unmap(fb->res->cs_buf); + enc->ws->buffer_unmap(fb->res->buf); } //dump_feedback(enc, fb); rvid_destroy_buffer(fb); @@ -522,7 +522,7 @@ bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen) /** * Add the buffer as relocation to the current command submission */ -void rvce_add_buffer(struct rvce_encoder *enc, struct radeon_winsys_cs_handle *buf, +void rvce_add_buffer(struct rvce_encoder *enc, struct pb_buffer *buf, enum radeon_bo_usage usage, enum radeon_bo_domain domain, signed offset) { diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h index 25e2133521f..8290e94fda7 100644 --- a/src/gallium/drivers/radeon/radeon_vce.h +++ b/src/gallium/drivers/radeon/radeon_vce.h @@ -50,7 +50,7 @@ struct r600_common_screen; /* driver dependent callback */ typedef void (*rvce_get_buffer)(struct pipe_resource *resource, - struct radeon_winsys_cs_handle **handle, + struct pb_buffer **handle, struct radeon_surf **surface); /* Coded picture buffer slot */ @@ -92,11 +92,11 @@ struct rvce_encoder { rvce_get_buffer get_buffer; - struct radeon_winsys_cs_handle* handle; + struct pb_buffer* handle; struct radeon_surf* luma; struct radeon_surf* chroma; - struct radeon_winsys_cs_handle* bs_handle; + struct pb_buffer* bs_handle; unsigned bs_size; struct rvce_cpb_slot *cpb_array; @@ -130,7 +130,7 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context, bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen); -void rvce_add_buffer(struct rvce_encoder *enc, struct radeon_winsys_cs_handle *buf, +void rvce_add_buffer(struct rvce_encoder *enc, struct pb_buffer *buf, enum radeon_bo_usage usage, enum radeon_bo_domain domain, signed offset); diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c index c0056590427..18bb28bcc88 100644 --- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c +++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c @@ -77,7 +77,7 @@ static void task_info(struct rvce_encoder *enc, uint32_t op, static void feedback(struct rvce_encoder *enc) { RVCE_BEGIN(0x05000005); // feedback buffer - RVCE_WRITE(enc->fb->res->cs_buf, enc->fb->res->domains, 0x0); // feedbackRingAddressHi/Lo + RVCE_WRITE(enc->fb->res->buf, enc->fb->res->domains, 0x0); // feedbackRingAddressHi/Lo RVCE_CS(0x00000001); // feedbackRingSize RVCE_END(); } @@ -303,7 +303,7 @@ static void encode(struct rvce_encoder *enc) enc->task_info(enc, 0x00000003, 0, 0, 0); RVCE_BEGIN(0x05000001); // context buffer - RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains, 0x0); // encodeContextAddressHi/Lo + RVCE_READWRITE(enc->cpb.res->buf, enc->cpb.res->domains, 0x0); // encodeContextAddressHi/Lo RVCE_END(); RVCE_BEGIN(0x05000004); // video bitstream buffer diff --git a/src/gallium/drivers/radeon/radeon_vce_50.c b/src/gallium/drivers/radeon/radeon_vce_50.c index afdab18c0d3..82e7ad2be76 100644 --- a/src/gallium/drivers/radeon/radeon_vce_50.c +++ b/src/gallium/drivers/radeon/radeon_vce_50.c @@ -95,7 +95,7 @@ static void encode(struct rvce_encoder *enc) enc->task_info(enc, 0x00000003, dep, 0, bs_idx); RVCE_BEGIN(0x05000001); // context buffer - RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo + RVCE_READWRITE(enc->cpb.res->buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo RVCE_END(); bs_offset = -(signed)(bs_idx * enc->bs_size); diff --git a/src/gallium/drivers/radeon/radeon_vce_52.c b/src/gallium/drivers/radeon/radeon_vce_52.c index fbae1f97f41..3894eea31cf 100644 --- a/src/gallium/drivers/radeon/radeon_vce_52.c +++ b/src/gallium/drivers/radeon/radeon_vce_52.c @@ -83,7 +83,7 @@ static void encode(struct rvce_encoder *enc) enc->task_info(enc, 0x00000003, dep, 0, bs_idx); RVCE_BEGIN(0x05000001); // context buffer - RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo + RVCE_READWRITE(enc->cpb.res->buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo RVCE_END(); bs_offset = -(signed)(bs_idx * enc->bs_size); diff --git a/src/gallium/drivers/radeon/radeon_video.c b/src/gallium/drivers/radeon/radeon_video.c index f56c6cf6cb4..ec29d8cb754 100644 --- a/src/gallium/drivers/radeon/radeon_video.c +++ b/src/gallium/drivers/radeon/radeon_video.c @@ -89,11 +89,11 @@ bool rvid_resize_buffer(struct pipe_screen *screen, struct radeon_winsys_cs *cs, if (!rvid_create_buffer(screen, new_buf, new_size, new_buf->usage)) goto error; - src = ws->buffer_map(old_buf.res->cs_buf, cs, PIPE_TRANSFER_READ); + src = ws->buffer_map(old_buf.res->buf, cs, PIPE_TRANSFER_READ); if (!src) goto error; - dst = ws->buffer_map(new_buf->res->cs_buf, cs, PIPE_TRANSFER_WRITE); + dst = ws->buffer_map(new_buf->res->buf, cs, PIPE_TRANSFER_WRITE); if (!dst) goto error; @@ -103,14 +103,14 @@ bool rvid_resize_buffer(struct pipe_screen *screen, struct radeon_winsys_cs *cs, dst += bytes; memset(dst, 0, new_size); } - ws->buffer_unmap(new_buf->res->cs_buf); - ws->buffer_unmap(old_buf.res->cs_buf); + ws->buffer_unmap(new_buf->res->buf); + ws->buffer_unmap(old_buf.res->buf); rvid_destroy_buffer(&old_buf); return true; error: if (src) - ws->buffer_unmap(old_buf.res->cs_buf); + ws->buffer_unmap(old_buf.res->buf); rvid_destroy_buffer(new_buf); *new_buf = old_buf; return false; diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 8bf1e15f3be..4af6a1877bf 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -235,7 +235,6 @@ enum radeon_bo_priority { }; struct winsys_handle; -struct radeon_winsys_cs_handle; struct radeon_winsys_ctx; struct radeon_winsys_cs { @@ -434,9 +433,6 @@ struct radeon_winsys { enum radeon_bo_domain domain, enum radeon_bo_flag flags); - struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)( - struct pb_buffer *buf); - /** * Map the entire data store of a buffer object into the client's address * space. @@ -446,7 +442,7 @@ struct radeon_winsys { * \param usage A bitmask of the PIPE_TRANSFER_* flags. * \return The pointer at the beginning of the buffer. */ - void *(*buffer_map)(struct radeon_winsys_cs_handle *buf, + void *(*buffer_map)(struct pb_buffer *buf, struct radeon_winsys_cs *cs, enum pipe_transfer_usage usage); @@ -455,7 +451,7 @@ struct radeon_winsys { * * \param buf A winsys buffer object to unmap. */ - void (*buffer_unmap)(struct radeon_winsys_cs_handle *buf); + void (*buffer_unmap)(struct pb_buffer *buf); /** * Wait for the buffer and return true if the buffer is not used @@ -552,12 +548,12 @@ struct radeon_winsys { * \param buf A winsys buffer object * \return virtual address */ - uint64_t (*buffer_get_virtual_address)(struct radeon_winsys_cs_handle *buf); + uint64_t (*buffer_get_virtual_address)(struct pb_buffer *buf); /** * Query the initial placement of the buffer from the kernel driver. */ - enum radeon_bo_domain (*buffer_get_initial_domain)(struct radeon_winsys_cs_handle *buf); + enum radeon_bo_domain (*buffer_get_initial_domain)(struct pb_buffer *buf); /************************************************************************** * Command submission. @@ -596,7 +592,7 @@ struct radeon_winsys { void (*flush)(void *ctx, unsigned flags, struct pipe_fence_handle **fence), void *flush_ctx, - struct radeon_winsys_cs_handle *trace_buf); + struct pb_buffer *trace_buf); /** * Destroy a command stream. @@ -617,7 +613,7 @@ struct radeon_winsys { * \return Buffer index. */ unsigned (*cs_add_buffer)(struct radeon_winsys_cs *cs, - struct radeon_winsys_cs_handle *buf, + struct pb_buffer *buf, enum radeon_bo_usage usage, enum radeon_bo_domain domain, enum radeon_bo_priority priority); @@ -630,7 +626,7 @@ struct radeon_winsys { * \return The buffer index, or -1 if the buffer has not been added. */ int (*cs_lookup_buffer)(struct radeon_winsys_cs *cs, - struct radeon_winsys_cs_handle *buf); + struct pb_buffer *buf); /** * Return TRUE if there is enough memory in VRAM and GTT for the buffers @@ -683,7 +679,7 @@ struct radeon_winsys { * \param buf A winsys buffer. */ boolean (*cs_is_buffer_referenced)(struct radeon_winsys_cs *cs, - struct radeon_winsys_cs_handle *buf, + struct pb_buffer *buf, enum radeon_bo_usage usage); /** diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index a871ea0d5b6..47a74eea0e0 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -267,7 +267,7 @@ static void si_launch_grid( /* The extra num_work_size_bytes are for work group / work item size information */ kernel_args_size = program->input_size + num_work_size_bytes + 8 /* For scratch va */; - kernel_args = sctx->b.ws->buffer_map(input_buffer->cs_buf, + kernel_args = sctx->b.ws->buffer_map(input_buffer->buf, sctx->b.gfx.cs, PIPE_TRANSFER_WRITE); for (i = 0; i < 3; i++) { kernel_args[i] = grid_layout[i]; diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index a5e3d79aa4d..dc62415823e 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -176,7 +176,7 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst, /* Fallback for unaligned clears. */ if (offset % 4 != 0 || size % 4 != 0) { - uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->cs_buf, + uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->buf, sctx->b.gfx.cs, PIPE_TRANSFER_WRITE); map += offset; diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c index 034acf56508..c45f8c0ea50 100644 --- a/src/gallium/drivers/radeonsi/si_debug.c +++ b/src/gallium/drivers/radeonsi/si_debug.c @@ -410,7 +410,7 @@ static void si_dump_last_ib(struct si_context *sctx, FILE *f) * waited for the context, so this buffer should be idle. * If the GPU is hung, there is no point in waiting for it. */ - uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->cs_buf, + uint32_t *map = sctx->b.ws->buffer_map(sctx->last_trace_buf->buf, NULL, PIPE_TRANSFER_UNSYNCHRONIZED | PIPE_TRANSFER_READ); diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 46cb035d74c..ac13407e2a1 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -143,7 +143,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, sctx->b.gfx.cs = ws->cs_create(sctx->b.ctx, RING_GFX, si_context_gfx_flush, sctx, sscreen->b.trace_bo ? - sscreen->b.trace_bo->cs_buf : NULL); + sscreen->b.trace_bo->buf : NULL); sctx->b.gfx.flush = si_context_gfx_flush; /* Border colors. */ @@ -160,7 +160,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, goto fail; sctx->border_color_map = - ws->buffer_map(sctx->border_color_buffer->cs_buf, + ws->buffer_map(sctx->border_color_buffer->buf, NULL, PIPE_TRANSFER_WRITE); if (!sctx->border_color_map) goto fail; diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 1baa2eb2178..4a672766b0f 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -3827,7 +3827,7 @@ int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader) if (!shader->bo) return -ENOMEM; - ptr = sscreen->b.ws->buffer_map(shader->bo->cs_buf, NULL, + ptr = sscreen->b.ws->buffer_map(shader->bo->buf, NULL, PIPE_TRANSFER_READ_WRITE); util_memcpy_cpu_to_le32(ptr, binary->code, binary->code_size); if (binary->rodata_size > 0) { @@ -3836,7 +3836,7 @@ int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader) binary->rodata_size); } - sscreen->b.ws->buffer_unmap(shader->bo->cs_buf); + sscreen->b.ws->buffer_unmap(shader->bo->buf); return 0; } diff --git a/src/gallium/drivers/radeonsi/si_uvd.c b/src/gallium/drivers/radeonsi/si_uvd.c index 2f10f9ba813..95bfecd2eaf 100644 --- a/src/gallium/drivers/radeonsi/si_uvd.c +++ b/src/gallium/drivers/radeonsi/si_uvd.c @@ -103,11 +103,9 @@ struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe, if (!resources[i]) continue; - /* recreate the CS handle */ - resources[i]->resource.cs_buf = ctx->b.ws->buffer_get_cs_handle( - resources[i]->resource.buf); + /* reset the address */ resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address( - resources[i]->resource.cs_buf); + resources[i]->resource.buf); } template.height *= array_size; @@ -121,7 +119,7 @@ error: } /* set the decoding target buffer offsets */ -static struct radeon_winsys_cs_handle* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf) +static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf) { struct r600_texture *luma = (struct r600_texture *)buf->resources[0]; struct r600_texture *chroma = (struct r600_texture *)buf->resources[1]; @@ -130,18 +128,18 @@ static struct radeon_winsys_cs_handle* si_uvd_set_dtb(struct ruvd_msg *msg, stru ruvd_set_dt_surfaces(msg, &luma->surface, &chroma->surface); - return luma->resource.cs_buf; + return luma->resource.buf; } /* get the radeon resources for VCE */ static void si_vce_get_buffer(struct pipe_resource *resource, - struct radeon_winsys_cs_handle **handle, + struct pb_buffer **handle, struct radeon_surf **surface) { struct r600_texture *res = (struct r600_texture *)resource; if (handle) - *handle = res->resource.cs_buf; + *handle = res->resource.buf; if (surface) *surface = &res->surface; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 6c294757731..daf41fcc6a3 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -118,7 +118,7 @@ static bool amdgpu_bo_wait(struct pb_buffer *_buf, uint64_t timeout, } static enum radeon_bo_domain amdgpu_bo_get_initial_domain( - struct radeon_winsys_cs_handle *buf) + struct pb_buffer *buf) { return ((struct amdgpu_winsys_bo*)buf)->initial_domain; } @@ -152,7 +152,7 @@ static void amdgpu_bo_destroy_or_cache(struct pb_buffer *_buf) amdgpu_bo_destroy(_buf); } -static void *amdgpu_bo_map(struct radeon_winsys_cs_handle *buf, +static void *amdgpu_bo_map(struct pb_buffer *buf, struct radeon_winsys_cs *rcs, enum pipe_transfer_usage usage) { @@ -232,7 +232,7 @@ static void *amdgpu_bo_map(struct radeon_winsys_cs_handle *buf, return r ? NULL : cpu; } -static void amdgpu_bo_unmap(struct radeon_winsys_cs_handle *buf) +static void amdgpu_bo_unmap(struct pb_buffer *buf) { struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf; @@ -446,12 +446,6 @@ static void amdgpu_bo_set_tiling(struct pb_buffer *_buf, amdgpu_bo_set_metadata(bo->bo, &metadata); } -static struct radeon_winsys_cs_handle *amdgpu_get_cs_handle(struct pb_buffer *_buf) -{ - /* return a direct pointer to amdgpu_winsys_bo. */ - return (struct radeon_winsys_cs_handle*)_buf; -} - static struct pb_buffer * amdgpu_bo_create(struct radeon_winsys *rws, unsigned size, @@ -682,14 +676,13 @@ error: return NULL; } -static uint64_t amdgpu_bo_get_va(struct radeon_winsys_cs_handle *buf) +static uint64_t amdgpu_bo_get_va(struct pb_buffer *buf) { return ((struct amdgpu_winsys_bo*)buf)->va; } void amdgpu_bo_init_functions(struct amdgpu_winsys *ws) { - ws->base.buffer_get_cs_handle = amdgpu_get_cs_handle; ws->base.buffer_set_tiling = amdgpu_bo_set_tiling; ws->base.buffer_get_tiling = amdgpu_bo_get_tiling; ws->base.buffer_map = amdgpu_bo_map; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 48f76cfe8af..10f112d01b3 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -214,7 +214,6 @@ static bool amdgpu_get_new_ib(struct amdgpu_cs *cs) if (!cs->big_ib_buffer || cs->used_ib_space + ib_size > cs->big_ib_buffer->size) { struct radeon_winsys *ws = &cs->ctx->ws->base; - struct radeon_winsys_cs_handle *winsys_bo; pb_reference(&cs->big_ib_buffer, NULL); cs->big_ib_winsys_buffer = NULL; @@ -228,15 +227,14 @@ static bool amdgpu_get_new_ib(struct amdgpu_cs *cs) if (!cs->big_ib_buffer) return false; - winsys_bo = ws->buffer_get_cs_handle(cs->big_ib_buffer); - - cs->ib_mapped = ws->buffer_map(winsys_bo, NULL, PIPE_TRANSFER_WRITE); + cs->ib_mapped = ws->buffer_map(cs->big_ib_buffer, NULL, + PIPE_TRANSFER_WRITE); if (!cs->ib_mapped) { pb_reference(&cs->big_ib_buffer, NULL); return false; } - cs->big_ib_winsys_buffer = (struct amdgpu_winsys_bo*)winsys_bo; + cs->big_ib_winsys_buffer = (struct amdgpu_winsys_bo*)cs->big_ib_buffer; } cs->ib.ib_mc_address = cs->big_ib_winsys_buffer->va + cs->used_ib_space; @@ -338,7 +336,7 @@ amdgpu_cs_create(struct radeon_winsys_ctx *rwctx, void (*flush)(void *ctx, unsigned flags, struct pipe_fence_handle **fence), void *flush_ctx, - struct radeon_winsys_cs_handle *trace_buf) + struct pb_buffer *trace_buf) { struct amdgpu_ctx *ctx = (struct amdgpu_ctx*)rwctx; struct amdgpu_cs *cs; @@ -457,7 +455,7 @@ static unsigned amdgpu_add_buffer(struct amdgpu_cs *cs, } static unsigned amdgpu_cs_add_buffer(struct radeon_winsys_cs *rcs, - struct radeon_winsys_cs_handle *buf, + struct pb_buffer *buf, enum radeon_bo_usage usage, enum radeon_bo_domain domains, enum radeon_bo_priority priority) @@ -480,7 +478,7 @@ static unsigned amdgpu_cs_add_buffer(struct radeon_winsys_cs *rcs, } static int amdgpu_cs_lookup_buffer(struct radeon_winsys_cs *rcs, - struct radeon_winsys_cs_handle *buf) + struct pb_buffer *buf) { struct amdgpu_cs *cs = amdgpu_cs(rcs); @@ -684,7 +682,7 @@ static void amdgpu_cs_destroy(struct radeon_winsys_cs *rcs) } static boolean amdgpu_bo_is_referenced(struct radeon_winsys_cs *rcs, - struct radeon_winsys_cs_handle *_buf, + struct pb_buffer *_buf, enum radeon_bo_usage usage) { struct amdgpu_cs *cs = amdgpu_cs(rcs); diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index 12c99e8266d..8e86f746217 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -115,7 +115,7 @@ static enum radeon_bo_domain get_valid_domain(enum radeon_bo_domain domain) } static enum radeon_bo_domain radeon_bo_get_initial_domain( - struct radeon_winsys_cs_handle *buf) + struct pb_buffer *buf) { struct radeon_bo *bo = (struct radeon_bo*)buf; struct drm_radeon_gem_op args; @@ -372,7 +372,7 @@ void *radeon_bo_do_map(struct radeon_bo *bo) return bo->ptr; } -static void *radeon_bo_map(struct radeon_winsys_cs_handle *buf, +static void *radeon_bo_map(struct pb_buffer *buf, struct radeon_winsys_cs *rcs, enum pipe_transfer_usage usage) { @@ -450,7 +450,7 @@ static void *radeon_bo_map(struct radeon_winsys_cs_handle *buf, return radeon_bo_do_map(bo); } -static void radeon_bo_unmap(struct radeon_winsys_cs_handle *_buf) +static void radeon_bo_unmap(struct pb_buffer *_buf) { struct radeon_bo *bo = (struct radeon_bo*)_buf; @@ -732,12 +732,6 @@ static void radeon_bo_set_tiling(struct pb_buffer *_buf, sizeof(args)); } -static struct radeon_winsys_cs_handle *radeon_drm_get_cs_handle(struct pb_buffer *_buf) -{ - /* return radeon_bo. */ - return (struct radeon_winsys_cs_handle*)radeon_bo(_buf); -} - static struct pb_buffer * radeon_winsys_bo_create(struct radeon_winsys *rws, unsigned size, @@ -1046,14 +1040,13 @@ static boolean radeon_winsys_bo_get_handle(struct pb_buffer *buffer, return TRUE; } -static uint64_t radeon_winsys_bo_va(struct radeon_winsys_cs_handle *buf) +static uint64_t radeon_winsys_bo_va(struct pb_buffer *buf) { return ((struct radeon_bo*)buf)->va; } void radeon_drm_bo_init_functions(struct radeon_drm_winsys *ws) { - ws->base.buffer_get_cs_handle = radeon_drm_get_cs_handle; ws->base.buffer_set_tiling = radeon_bo_set_tiling; ws->base.buffer_get_tiling = radeon_bo_get_tiling; ws->base.buffer_map = radeon_bo_map; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c index 32b56f989cd..085071c381c 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c @@ -169,7 +169,7 @@ radeon_drm_cs_create(struct radeon_winsys_ctx *ctx, void (*flush)(void *ctx, unsigned flags, struct pipe_fence_handle **fence), void *flush_ctx, - struct radeon_winsys_cs_handle *trace_buf) + struct pb_buffer *trace_buf) { struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)ctx; struct radeon_drm_cs *cs; @@ -322,7 +322,7 @@ static unsigned radeon_add_buffer(struct radeon_drm_cs *cs, } static unsigned radeon_drm_cs_add_buffer(struct radeon_winsys_cs *rcs, - struct radeon_winsys_cs_handle *buf, + struct pb_buffer *buf, enum radeon_bo_usage usage, enum radeon_bo_domain domains, enum radeon_bo_priority priority) @@ -342,7 +342,7 @@ static unsigned radeon_drm_cs_add_buffer(struct radeon_winsys_cs *rcs, } static int radeon_drm_cs_lookup_buffer(struct radeon_winsys_cs *rcs, - struct radeon_winsys_cs_handle *buf) + struct pb_buffer *buf) { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); @@ -616,7 +616,7 @@ static void radeon_drm_cs_destroy(struct radeon_winsys_cs *rcs) } static boolean radeon_bo_is_referenced(struct radeon_winsys_cs *rcs, - struct radeon_winsys_cs_handle *_buf, + struct pb_buffer *_buf, enum radeon_bo_usage usage) { struct radeon_drm_cs *cs = radeon_drm_cs(rcs); @@ -650,7 +650,7 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs) fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, TRUE, RADEON_DOMAIN_GTT, 0); /* Add the fence as a dummy relocation. */ - cs->ws->base.cs_add_buffer(rcs, cs->ws->base.buffer_get_cs_handle(fence), + cs->ws->base.cs_add_buffer(rcs, fence, RADEON_USAGE_READWRITE, RADEON_DOMAIN_GTT, RADEON_PRIO_FENCE); return (struct pipe_fence_handle*)fence;