From: Jacob Lifshay <programmerjake@gmail.com>
Date: Tue, 14 Mar 2023 00:01:28 +0000 (-0700)
Subject: add crternlogi to ls007
X-Git-Tag: opf_rfc_ls001_v3~175
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cfe4cc313cb9d5693af96a6b775cb1abb932c945;p=libreriscv.git

add crternlogi to ls007
---

diff --git a/openpower/sv/rfc/ls007.mdwn b/openpower/sv/rfc/ls007.mdwn
index 757d868e9..ae2d6df9d 100644
--- a/openpower/sv/rfc/ls007.mdwn
+++ b/openpower/sv/rfc/ls007.mdwn
@@ -181,6 +181,39 @@ CR0                    (if Rc=1)
 
 \newpage{}
 
+# Condition Register Ternary Logic Immediate CRB-form
+
+Add this section to Book I 2.5.1
+
+* `crternlogi BT, BA, BB, BC, TLI, msk`
+
+| 0.5| 6-8 | 9-11 | 12-14 | 15-17 | 18-20 | 21-28 | 29-30 | 31  | Form     |
+|----|-----|------|-------|-------|-------|-------|-------|-----|----------|
+| PO | BF  | BFA  | BFB   | BFC   | msk   |  TLI  |  XO   | msk | CRB-Form |
+
+Pseudocode:
+
+```
+a <- CR[4*BFA+32:4*BFA+35]
+b <- CR[4*BFB+32:4*BFB+35]
+c <- CR[4*BFC+32:4*BFC+35]
+do i = 0 to 3
+    idx <- a[i] || b[i] || c[i]  # compute index from current bits
+    result <- TLI[7 - idx]  # subtract from 7 to index in LSB0 order
+    if msk[i] = 1 then
+        CR[4*BF+32+i] <- result
+```
+
+Special registers altered:
+
+```
+CR field BF
+```
+
+----------
+
+\newpage{}
+
 # Dynamic Binary Logic VA-form
 
 Add this section to Book I 3.3.13