From: Daniel Benusovich <flyingmonkeys1996@gmail.com>
Date: Fri, 23 Nov 2018 06:14:51 +0000 (-0800)
Subject: Updating sv_add_elwidth to use SV_ELWIDTH_TEST macro from sv_test_macros
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cffc14b48181a9ddbcc73b0a6e6b67d01f63e402;p=riscv-tests.git

Updating sv_add_elwidth to use SV_ELWIDTH_TEST macro from sv_test_macros
---

diff --git a/isa/macros/simplev/sv_test_macros.h b/isa/macros/simplev/sv_test_macros.h
index 35a415c..9f16a84 100644
--- a/isa/macros/simplev/sv_test_macros.h
+++ b/isa/macros/simplev/sv_test_macros.h
@@ -116,7 +116,7 @@
         load_instruction( x14, testdata+elwidth*2);                     \
         load_instruction( x15, testdata+elwidth*3);                     \
         load_instruction( x16, testdata+elwidth*4);                     \
-        load_instruction( x17, testdata++elwidth*5);  			\
+        load_instruction( x17, testdata+elwidth*5);  			\
 
 // Loads the source registers using load_instruction from testdata with a spacing of elwidth and offset
 #define SV_LOAD_FORMAT_OFFSET(load_instruction, testdata, elwidth, offset)   \
@@ -183,3 +183,4 @@
 #define SV_W_8BIT 1
 #define SV_W_16BIT 2
 #define SV_W_32BIT 3
+#define SV_W_DEFAULT_EXPECT 0xa5a5a5a5a5a5a5a5
diff --git a/isa/rv64ui/sv_add_elwidth.S b/isa/rv64ui/sv_add_elwidth.S
index 0ee22b6..6e627ff 100644
--- a/isa/rv64ui/sv_add_elwidth.S
+++ b/isa/rv64ui/sv_add_elwidth.S
@@ -3,34 +3,6 @@
 
 RVTEST_RV64U        # Define TVM used by program.
 
-#define SV_ELWIDTH_TEST( wid1, wid2, wid3, expect1, expect2 ) \
-                                                        \
-        SV_LDD_DATA( x4, testdata   , 0);               \
-        SV_LDD_DATA( x5, testdata+8 , 0);               \
-        SV_LDD_DATA( x12, testdata+16, 0);               \
-        SV_LDD_DATA( x13, testdata+24, 0);               \
-                                                        \
-        li x14, 0;                                      \
-        li x15, 0;                                      \
-                                                        \
-        SET_SV_MVL( 2);                                  \
-        SET_SV_3CSRS( SV_REG_CSR( 1, 4, wid1, 4, 1),       \
-                      SV_REG_CSR( 1, 12, wid2, 12, 1),        \
-                      SV_REG_CSR( 1, 14, wid3, 14, 1));       \
-        SET_SV_VL( 2);                                   \
-                                                        \
-        add    x14, x4, x12;                              \
-                                                        \
-        CLR_SV_CSRS();                                  \
-        SET_SV_VL( 1);                                   \
-        SET_SV_MVL( 1);                                  \
-                                                        \
-        TEST_SV_IMM( x14, expect1 );                         \
-        TEST_SV_IMM( x15, expect2 );                       \
-        TEST_SV_IMM( x12, 0x0000005242322212);                       \
-        TEST_SV_IMM( x13, 0x0000005141312111);
-
-
 # SV test: vector-vector add
 #
 # sets up x3 and x4 with data, sets VL to 2, and carries out
@@ -40,9 +12,12 @@ RVTEST_RV64U        # Define TVM used by program.
 RVTEST_CODE_BEGIN   # Start of test code.
 
         # 
-        SV_ELWIDTH_TEST(  0, 0, 0, 0x000000ab8b6b4b2b,  0x000000a888684828 )
-        SV_ELWIDTH_TEST(  0, 0, 3, 0x886848288b6b4b2b,  0x0000000000000000 )
-        SV_ELWIDTH_TEST(  1, 1, 0, 0x000000000000002b,  0x000000000000004b )
+        SV_ELWIDTH_TEST( add, SV_LDD_DATA, testdata, 8, 0, 2, 0, 0, 0, 1, 1, 1,
+			 0x000000ab8b6b4b2b,  0x000000a888684828, SV_W_DEFAULT_EXPECT)
+	SV_ELWIDTH_TEST( add, SV_LDD_DATA, testdata, 8, 0, 2, 0, 0, 3, 1, 1, 1,
+			 0x886848288b6b4b2b,  SV_W_DEFAULT_EXPECT, SV_W_DEFAULT_EXPECT)
+	SV_ELWIDTH_TEST( add, SV_LDD_DATA, testdata, 8, 0, 2, 1, 1, 0, 1, 1, 1,
+			 0x000000000000002b,  0x000000000000004b, SV_W_DEFAULT_EXPECT)
 
         RVTEST_PASS           # Signal success.
 fail:
@@ -56,8 +31,10 @@ RVTEST_CODE_END     # End of test code.
 testdata:
         .dword 0x0000005949392919
         .dword 0x0000005747372717
+	.dword 0x0000000000000000
         .dword 0x0000005242322212
         .dword 0x0000005141312111
+	.dword 0x0000000000000000
 
 # Output data section.
 RVTEST_DATA_BEGIN   # Start of test output data region.