From: lkcl Date: Sat, 20 Mar 2021 09:56:58 +0000 (+0000) Subject: (no commit message) X-Git-Tag: DRAFT_SVP64_0_1~1168 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d004e2103ece02498e81cb5c0a0038db2414f303;p=libreriscv.git --- diff --git a/openpower/sv/av_opcodes.mdwn b/openpower/sv/av_opcodes.mdwn index b8fed4e21..728912489 100644 --- a/openpower/sv/av_opcodes.mdwn +++ b/openpower/sv/av_opcodes.mdwn @@ -18,11 +18,11 @@ In-advance, the summary of base scalar operations that need to be added is: | ------------ | ------------------------ | | average-add. | result = (src1 + src2 + 1) >> 1 | | abs-diff | result = abs (src1-src2) | -| signed min | result = (src1 < src2) ? src1 : src2 | -| signed max | result = (src1 > src2) ? src1 : src2 | +| signed min | result = (src1 < src2) ? src1 : src2 use bitmanip | +| signed max | result = (src1 > src2) ? src1 : src2 use bitmanip | | bitwise sel | (a ? b : c) - use bitmanip ternary | -All other capabilities (saturate in particular) are achieved with [[sv/svp64]] modes and swizzle. Note that unsigned integer minmax is added in bitmanip. +All other capabilities (saturate in particular) are achieved with [[sv/svp64]] modes and swizzle. Note that minmax and ternary are added in bitmanip. # Audio