From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 26 Jul 2021 09:36:16 +0000 (+0100)
Subject: unnecessary whitespace test
X-Git-Tag: DRAFT_SVP64_0_1~587
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d057c9467f752c55478438cbb41bd3a44c47be78;p=libreriscv.git

unnecessary whitespace test
---

diff --git a/resources.mdwn b/resources.mdwn
index 155c2f271..5f854ceb0 100644
--- a/resources.mdwn
+++ b/resources.mdwn
@@ -365,6 +365,7 @@ Some learning resources I found in the community:
 * Circuitverse 16-bit <https://circuitverse.org/users/17603/projects/54486>
 * Nice example model of a Tomasulo-based architecture, with multi-issue, in-order issue, out-of-order execution, in-order commit, with reservation stations and reorder buffers, and hazard avoidance.
 <https://www.brown.edu/Departments/Engineering/Courses/En164/Tomasulo_10.pdf> 
+
 # Real/Physical Projects
 
 * [Samuel's KC5 code](http://chiselapp.com/user/kc5tja/repository/kestrel-3/dir?ci=6c559135a301f321&name=cores/cpu)