From: Maciej W. Rozycki <macro@imgtec.com>
Date: Wed, 16 Nov 2016 21:35:02 +0000 (+0000)
Subject: MIPS16/GCC: Fix DImode `casesi_internal_mips16_<mode>' assembly instructions
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d08c0ea31303046ce5e7da8ba8a2ff112589bc86;p=gcc.git

MIPS16/GCC: Fix DImode `casesi_internal_mips16_<mode>' assembly instructions

	gcc/
	* config/mips/mips.md (casesi_internal_mips16_<mode>): Add
	missing <d> instruction prefixes throughout.  Correct
	formatting.

	gcc/testsuite/
	* gcc.target/mips/code-readable-4.c (dg-final): Expect `dla'
	rather than `la'.

From-SVN: r242514
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4e437f0bb67..30161a022ea 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-11-16  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* config/mips/mips.md (casesi_internal_mips16_<mode>): Add
+	missing <d> instruction prefixes throughout.  Correct
+	formatting.
+
 2016-11-16  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* config/mips/mips.c (mips_output_jump): Output R_MICROMIPS_JALR
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index dc071d5e7b2..0ccee9ead45 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -6424,14 +6424,14 @@
     {
     case HImode:
       output_asm_insn ("sll\t%5, %0, 1", operands);
-      output_asm_insn ("la\t%4, %2", operands);
+      output_asm_insn ("<d>la\t%4, %2", operands);
       output_asm_insn ("<d>addu\t%5, %4, %5", operands);
       output_asm_insn ("lh\t%5, 0(%5)", operands);
       break;
-    
+
     case SImode:
       output_asm_insn ("sll\t%5, %0, 2", operands);
-      output_asm_insn ("la\t%4, %2", operands);
+      output_asm_insn ("<d>la\t%4, %2", operands);
       output_asm_insn ("<d>addu\t%5, %4, %5", operands);
       output_asm_insn ("lw\t%5, 0(%5)", operands);
       break;
@@ -6439,9 +6439,9 @@
     default:
       gcc_unreachable ();
     }
-  
-  output_asm_insn ("addu\t%4, %4, %5", operands);
-  
+
+  output_asm_insn ("<d>addu\t%4, %4, %5", operands);
+
   return "j\t%4";
 }
   [(set_attr "insn_count" "16")])
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0677079fb2b..3707e7c29d2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-11-16  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* gcc.target/mips/code-readable-4.c (dg-final): Expect `dla'
+	rather than `la'.
+
 2016-11-16  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* gcc.target/mips/call-1.c (dg-options): Add `-mno-micromips'.
diff --git a/gcc/testsuite/gcc.target/mips/code-readable-4.c b/gcc/testsuite/gcc.target/mips/code-readable-4.c
index beb9248de75..1a6fdf429be 100644
--- a/gcc/testsuite/gcc.target/mips/code-readable-4.c
+++ b/gcc/testsuite/gcc.target/mips/code-readable-4.c
@@ -41,7 +41,7 @@ bar (void)
   return k;
 }
 
-/* { dg-final { scan-assembler "\tla\t" } } */
+/* { dg-final { scan-assembler "\tdla\t" } } */
 /* { dg-final { scan-assembler "\t\\.half\t" } } */
 /* { dg-final { scan-assembler-not "%hi\\(\[^)\]*L" } } */
 /* { dg-final { scan-assembler-not "%lo\\(\[^)\]*L" } } */