From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Fri, 17 Nov 2023 15:32:56 +0000 (+0000)
Subject: Added English language description for lwzupsx instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d0b7e4f8e9ccf01ddef7488b3c34de847379995e;p=openpower-isa.git

Added English language description for lwzupsx instruction
---

diff --git a/openpower/isa/pifixedloadshift.mdwn b/openpower/isa/pifixedloadshift.mdwn
index 265ce4ec..1f9d3148 100644
--- a/openpower/isa/pifixedloadshift.mdwn
+++ b/openpower/isa/pifixedloadshift.mdwn
@@ -99,17 +99,18 @@ Special Registers Altered:
 
 X-Form
 
-* lwzupsx RT,RA,RB
+* lwzupsx RT,RA,RB,SH
 
 Pseudo-code:
 
-    EA <- (RA)
+    EA <- (RA)<<(SH+1)
     RT <- [0] * 32 || MEM(EA, 4)
     RA <- (RA) + (RB)
 
 Description:
 
-    Let the effective address (EA) be the register RA.
+    Let the effective address (EA) be the contents of
+    register RA shifted by (SH+1).
 
     The halfword in storage addressed by EA is loaded into RT[48:63].
     RT[0:47] are filled with a copy of bit 0 of the loaded halfword.