From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Sun, 8 Sep 2013 10:55:26 +0000 (+0200)
Subject: dvisampler: reset PLL at startup
X-Git-Tag: 24jan2021_ls180~2843
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d0edb7e2b8cc08c9d9f73d01abc2413c76a46d4b;p=litex.git

dvisampler: reset PLL at startup
---

diff --git a/milkymist/dvisampler/clocking.py b/milkymist/dvisampler/clocking.py
index bf6f01e8..9e261d05 100644
--- a/milkymist/dvisampler/clocking.py
+++ b/milkymist/dvisampler/clocking.py
@@ -4,7 +4,7 @@ from migen.bank.description import *
 
 class Clocking(Module, AutoCSR):
 	def __init__(self, pads):
-		self._r_pll_reset = CSRStorage()
+		self._r_pll_reset = CSRStorage(reset=1)
 		self._r_locked = CSRStatus()
 
 		self.locked = Signal()