From: whitequark Date: Sat, 11 Dec 2021 13:37:15 +0000 (+0000) Subject: build.dsl: check type of resource number. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d1138732ba44291208c67ac8f2b5b451a9df4cb3;p=nmigen.git build.dsl: check type of resource number. Fixes #599. --- diff --git a/nmigen/build/dsl.py b/nmigen/build/dsl.py index 3b445f6..9763fa2 100644 --- a/nmigen/build/dsl.py +++ b/nmigen/build/dsl.py @@ -197,8 +197,11 @@ class Resource(Subsignal): return cls(name_or_number + name_suffix, number, *ios) def __init__(self, name, number, *args): - super().__init__(name, *args) + if not isinstance(number, int): + raise TypeError("Resource number must be an integer, not {!r}" + .format(number)) + super().__init__(name, *args) self.number = number def __repr__(self): diff --git a/tests/test_build_dsl.py b/tests/test_build_dsl.py index 580b962..1d4dad8 100644 --- a/tests/test_build_dsl.py +++ b/tests/test_build_dsl.py @@ -242,6 +242,12 @@ class ResourceTestCase(FHDLTestCase): " (subsignal rx (pins i A1))" " (attrs IOSTANDARD='LVCMOS33'))") + def test_number_wrong(self): + with self.assertRaisesRegex(TypeError, + r"^Resource number must be an integer, not \(pins o 1\)$"): + # number omitted by accident + Resource("led", Pins("1", dir="o")) + def test_family(self): ios = [Subsignal("clk", Pins("A0", dir="o"))] r1 = Resource.family(0, default_name="spi", ios=ios)