From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 30 Jun 2022 21:59:59 +0000 (+0100)
Subject: shorten link
X-Git-Tag: opf_rfc_ls005_v1~1429
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d1467f7becbc085c59166245f2f778d528a5af31;p=libreriscv.git

shorten link
---

diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn
index 1cf0a31d3..69460d8bd 100644
--- a/openpower/sv.mdwn
+++ b/openpower/sv.mdwn
@@ -162,7 +162,7 @@ Scalar Instructions:
 * Twin targetted instructions (two registers out, one implicit, just like
   Load-with-Update).
   Explanation of the rules for twin register targets
-  (implicit RS, FRS) explained in SVP64 [[sv/svp64/appendix]]
+  (implicit RS, FRS) explained in SVP64 [[svp64/appendix]]
   - [[isa/svfixedarith]]
   - [[isa/svfparith]]
   - [[sv/biginteger]] Operations that help with big arithmetic