From: Maciej W. Rozycki Date: Sun, 6 Mar 2022 18:30:58 +0000 (+0000) Subject: MIPS/opcodes: Fix alias annotation for branch instructions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d17e797f5c67d3b73de0e387a83134add2b444fe;p=binutils-gdb.git MIPS/opcodes: Fix alias annotation for branch instructions Correct issues with INSN2_ALIAS annotation for branch instructions: - regular MIPS BEQZ/L and BNEZ/L assembly instructions are idioms for BEQ/L and BNE/L respectively with the `rs' operand equal to $0, - microMIPS 32-bit BEQZ and BNEZ assembly instructions are idioms for BEQ and BNE respectively with the `rt' operand equal to $0, - regular MIPS BAL assembly instruction is an idiom for architecture levels of up to the MIPSr5 ISA and a machine instruction on its own from the MIPSr6 ISA up. Add missing annotation to BEQZ/L and BNEZ/L accordingly then and add a new entry for BAL for the MIPSr6 ISA, correcting a disassembly bug: $ mips-linux-gnu-objdump -m mips:isa64r6 -M no-aliases -d bal.o bal.o: file format elf32-tradlittlemips Disassembly of section .text: 00000000 : 0: 04110000 0x4110000 ... $ Add test cases accordingly. Parts for regular MIPS BEQZ/L and BNEZ/L instructions from Sagar Patel. 2022-03-06 Maciej W. Rozycki binutils/ * testsuite/binutils-all/mips/mips1-branch-alias.d: New test. * testsuite/binutils-all/mips/mips1-branch-noalias.d: New test. * testsuite/binutils-all/mips/mips2-branch-alias.d: New test. * testsuite/binutils-all/mips/mips2-branch-noalias.d: New test. * testsuite/binutils-all/mips/mips32r6-branch-alias.d: New test. * testsuite/binutils-all/mips/mips32r6-branch-noalias.d: New test. * testsuite/binutils-all/mips/micromips-branch-alias.d: New test. * testsuite/binutils-all/mips/micromips-branch-noalias.d: New test. * testsuite/binutils-all/mips/mips-branch-alias.s: New test source. * testsuite/binutils-all/mips/micromips-branch-alias.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests. 2022-03-06 Sagar Patel Maciej W. Rozycki opcodes/ * mips-opc.c (mips_builtin_opcodes): Fix INSN2_ALIAS annotation for "bal", "beqz", "beqzl", "bnez" and "bnezl" instructions. * micromips-opc.c (micromips_opcodes): Likewise for "beqz" and "bnez" instructions. --- diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 1a8da33f509..a355e18de74 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,22 @@ +2021-03-06 Maciej W. Rozycki + + * testsuite/binutils-all/mips/mips1-branch-alias.d: New test. + * testsuite/binutils-all/mips/mips1-branch-noalias.d: New test. + * testsuite/binutils-all/mips/mips2-branch-alias.d: New test. + * testsuite/binutils-all/mips/mips2-branch-noalias.d: New test. + * testsuite/binutils-all/mips/mips32r6-branch-alias.d: New test. + * testsuite/binutils-all/mips/mips32r6-branch-noalias.d: New + test. + * testsuite/binutils-all/mips/micromips-branch-alias.d: New + test. + * testsuite/binutils-all/mips/micromips-branch-noalias.d: New + test. + * testsuite/binutils-all/mips/mips-branch-alias.s: New test + source. + * testsuite/binutils-all/mips/micromips-branch-alias.s: New test + source. + * testsuite/binutils-all/mips/mips.exp: Run the new tests. + 2022-03-04 Simon Marchi * readelf.c (process_dynamic_section): Fix indentation. diff --git a/binutils/testsuite/binutils-all/mips/micromips-branch-alias.d b/binutils/testsuite/binutils-all/mips/micromips-branch-alias.d new file mode 100644 index 00000000000..3a5a879ead0 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/micromips-branch-alias.d @@ -0,0 +1,17 @@ +#PROG: objcopy +#objdump: -d --prefix-addresses --show-raw-insn +#name: microMIPS branch instruction alias disassembly +#source: micromips-branch-alias.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 9400 0000 b [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 4040 0000 b [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 40e0 0000 bc [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 9401 0000 beqz at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> b401 0000 bnez at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 4060 0000 bal [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 4260 0000 bals [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 0000 0000 nop + \.\.\. diff --git a/binutils/testsuite/binutils-all/mips/micromips-branch-alias.s b/binutils/testsuite/binutils-all/mips/micromips-branch-alias.s new file mode 100644 index 00000000000..3d27bb47178 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/micromips-branch-alias.s @@ -0,0 +1,17 @@ + .text + .set mips32r3 + .set noat + .set noreorder + .set micromips +foo: + beq $0, $0, . + 4 + bgez $0, . + 4 + beqzc $0, . + 4 + beqz $1, . + 4 + bnez $1, . + 4 + bgezal $0, . + 4 + bgezals $0, . + 4 + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/testsuite/binutils-all/mips/micromips-branch-noalias.d b/binutils/testsuite/binutils-all/mips/micromips-branch-noalias.d new file mode 100644 index 00000000000..3c9fa7d33e6 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/micromips-branch-noalias.d @@ -0,0 +1,17 @@ +#PROG: objcopy +#objdump: -M no-aliases -d --prefix-addresses --show-raw-insn +#name: microMIPS branch canonical alias disassembly +#source: micromips-branch-alias.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 9400 0000 beq zero,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 4040 0000 bgez zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 40e0 0000 beqzc zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 9401 0000 beq at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> b401 0000 bne at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 4060 0000 bgezal zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 4260 0000 bgezals zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 0000 0000 sll zero,zero,0x0 + \.\.\. diff --git a/binutils/testsuite/binutils-all/mips/mips-branch-alias.s b/binutils/testsuite/binutils-all/mips/mips-branch-alias.s new file mode 100644 index 00000000000..dfde3c0b5fb --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/mips-branch-alias.s @@ -0,0 +1,18 @@ + .text + .set noat + .set noreorder + .set mips2 +foo: + beq $0, $0, . + 4 + bgez $0, . + 4 + bgezal $0, . + 4 + bltzal $0, . + 4 + beqz $1, . + 4 + bnez $1, . + 4 + + beqzl $1, . + 4 + bnezl $1, . + 4 + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/binutils/testsuite/binutils-all/mips/mips.exp b/binutils/testsuite/binutils-all/mips/mips.exp index 3d818f812ef..b6fe11d85a5 100644 --- a/binutils/testsuite/binutils-all/mips/mips.exp +++ b/binutils/testsuite/binutils-all/mips/mips.exp @@ -238,6 +238,14 @@ run_dump_test_o32 "mips16-extend-insn" noarch run_dump_test_o32 "mips16e2-extend-insn" noarch run_dump_test_o32 "mips16-alias" noarch run_dump_test_o32 "mips16-noalias" noarch +run_dump_test_o32 "mips1-branch-alias" +run_dump_test_o32 "mips1-branch-noalias" +run_dump_test_o32 "mips2-branch-alias" +run_dump_test_o32 "mips2-branch-noalias" +run_dump_test_o32 "mips32r6-branch-alias" +run_dump_test_o32 "mips32r6-branch-noalias" +run_dump_test_o32 "micromips-branch-alias" +run_dump_test_o32 "micromips-branch-noalias" run_dump_test_o32 "mips-note-2" run_dump_test_n32 "mips-note-2-n32" diff --git a/binutils/testsuite/binutils-all/mips/mips1-branch-alias.d b/binutils/testsuite/binutils-all/mips/mips1-branch-alias.d new file mode 100644 index 00000000000..467775f97c9 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/mips1-branch-alias.d @@ -0,0 +1,17 @@ +#PROG: objcopy +#objdump: -m mips:3000 -d --prefix-addresses --show-raw-insn +#name: MIPS1 branch instruction alias disassembly +#source: mips-branch-alias.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04010000 b [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04110000 bal [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04100000 bltzal zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 10200000 beqz at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 14200000 bnez at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 50200000 0x50200000 +[0-9a-f]+ <[^>]*> 54200000 0x54200000 + \.\.\. diff --git a/binutils/testsuite/binutils-all/mips/mips1-branch-noalias.d b/binutils/testsuite/binutils-all/mips/mips1-branch-noalias.d new file mode 100644 index 00000000000..b3fa8a0f917 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/mips1-branch-noalias.d @@ -0,0 +1,17 @@ +#PROG: objcopy +#objdump: -M no-aliases -m mips:3000 -d --prefix-addresses --show-raw-insn +#name: MIPS1 branch canonical alias disassembly +#source: mips-branch-alias.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 10000000 beq zero,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04010000 bgez zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04110000 bgezal zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04100000 bltzal zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 10200000 beq at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 14200000 bne at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 50200000 0x50200000 +[0-9a-f]+ <[^>]*> 54200000 0x54200000 + \.\.\. diff --git a/binutils/testsuite/binutils-all/mips/mips2-branch-alias.d b/binutils/testsuite/binutils-all/mips/mips2-branch-alias.d new file mode 100644 index 00000000000..f1fbeea2830 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/mips2-branch-alias.d @@ -0,0 +1,18 @@ +#PROG: objcopy +#objdump: -m mips:6000 -d --prefix-addresses --show-raw-insn +#name: MIPS2 branch instruction alias disassembly +#source: mips-branch-alias.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04010000 b [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04110000 bal [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04100000 bltzal zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 10200000 beqz at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 14200000 bnez at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 50200000 beqzl at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 54200000 bnezl at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 00000000 nop + \.\.\. diff --git a/binutils/testsuite/binutils-all/mips/mips2-branch-noalias.d b/binutils/testsuite/binutils-all/mips/mips2-branch-noalias.d new file mode 100644 index 00000000000..0f819e827ab --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/mips2-branch-noalias.d @@ -0,0 +1,18 @@ +#PROG: objcopy +#objdump: -M no-aliases -m mips:6000 -d --prefix-addresses --show-raw-insn +#name: MIPS2 branch canonical alias disassembly +#source: mips-branch-alias.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 10000000 beq zero,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04010000 bgez zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04110000 bgezal zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04100000 bltzal zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 10200000 beq at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 14200000 bne at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 50200000 beql at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 54200000 bnel at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 00000000 sll zero,zero,0x0 + \.\.\. diff --git a/binutils/testsuite/binutils-all/mips/mips32r6-branch-alias.d b/binutils/testsuite/binutils-all/mips/mips32r6-branch-alias.d new file mode 100644 index 00000000000..aebbb26a6f2 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/mips32r6-branch-alias.d @@ -0,0 +1,17 @@ +#PROG: objcopy +#objdump: -m mips:isa32r6 -d --prefix-addresses --show-raw-insn +#name: MIPS32r6 branch instruction alias disassembly +#source: mips-branch-alias.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 10000000 b [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04010000 b [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04110000 bal [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04100000 nal +[0-9a-f]+ <[^>]*> 10200000 beqz at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 14200000 bnez at,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 50200000 0x50200000 +[0-9a-f]+ <[^>]*> 54200000 0x54200000 + \.\.\. diff --git a/binutils/testsuite/binutils-all/mips/mips32r6-branch-noalias.d b/binutils/testsuite/binutils-all/mips/mips32r6-branch-noalias.d new file mode 100644 index 00000000000..d7d512f7962 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/mips32r6-branch-noalias.d @@ -0,0 +1,17 @@ +#PROG: objcopy +#objdump: -M no-aliases -m mips:isa32r6 -d --prefix-addresses --show-raw-insn +#name: MIPS32r6 branch canonical alias disassembly +#source: mips-branch-alias.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 10000000 beq zero,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04010000 bgez zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04110000 bal [0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 04100000 nal +[0-9a-f]+ <[^>]*> 10200000 beq at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 14200000 bne at,zero,[0-9a-f]+ <[^>]*> +[0-9a-f]+ <[^>]*> 50200000 0x50200000 +[0-9a-f]+ <[^>]*> 54200000 0x54200000 + \.\.\. diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 03f1601c695..98ad3084e43 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2022-03-06 Sagar Patel + Maciej W. Rozycki + + * mips-opc.c (mips_builtin_opcodes): Fix INSN2_ALIAS annotation + for "bal", "beqz", "beqzl", "bnez" and "bnezl" instructions. + * micromips-opc.c (micromips_opcodes): Likewise for "beqz" and + "bnez" instructions. + 2022-02-17 Nick Clifton * po/sr.po: Updated Serbian translation. diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c index b0109b03319..9393e22be5b 100644 --- a/opcodes/micromips-opc.c +++ b/opcodes/micromips-opc.c @@ -373,7 +373,7 @@ const struct mips_opcode micromips_opcodes[] = {"bc2tl", "p", 0, (int) M_BC2TL, INSN_MACRO, 0, I1, 0, 0 }, {"bc2tl", "N,p", 0, (int) M_BC2TL, INSN_MACRO, 0, I1, 0, 0 }, {"beqz", "md,mE", 0x8c00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, -{"beqz", "s,p", 0x94000000, 0xffe00000, RD_1|CBD, 0, I1, 0, 0 }, +{"beqz", "s,p", 0x94000000, 0xffe00000, RD_1|CBD, INSN2_ALIAS, I1, 0, 0 }, {"beqzl", "s,p", 0, (int) M_BEQL, INSN_MACRO, 0, I1, 0, 0 }, {"beq", "md,mz,mE", 0x8c00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, /* beqz */ {"beq", "mz,md,mE", 0x8c00, 0xfc00, RD_2|CBD, 0, I1, 0, 0 }, /* beqz */ @@ -431,7 +431,7 @@ const struct mips_opcode micromips_opcodes[] = {"bltzals", "s,p", 0x42200000, 0xffe00000, RD_1|WR_31|CBD, BD16, I1, 0, 0 }, {"bltzall", "s,p", 0, (int) M_BLTZALL, INSN_MACRO, 0, I1, 0, 0 }, {"bnez", "md,mE", 0xac00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, -{"bnez", "s,p", 0xb4000000, 0xffe00000, RD_1|CBD, 0, I1, 0, 0 }, +{"bnez", "s,p", 0xb4000000, 0xffe00000, RD_1|CBD, INSN2_ALIAS, I1, 0, 0 }, {"bnezl", "s,p", 0, (int) M_BNEL, INSN_MACRO, 0, I1, 0, 0 }, {"bne", "md,mz,mE", 0xac00, 0xfc00, RD_1|CBD, 0, I1, 0, 0 }, /* bnez */ {"bne", "mz,md,mE", 0xac00, 0xfc00, RD_2|CBD, 0, I1, 0, 0 }, /* bnez */ diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 0f596d5d43b..329bdc628cb 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -460,7 +460,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_1|RD_2, INSN2_ALIAS, I1, 0, 0 },/* addu */ {"b", "p", 0x10000000, 0xffff0000, UBD, INSN2_ALIAS, I1, 0, 0 },/* beq 0,0 */ {"b", "p", 0x04010000, 0xffff0000, UBD, INSN2_ALIAS, I1, 0, 0 },/* bgez 0 */ -{"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, INSN2_ALIAS, I1, 0, 0 },/* bgezal 0*/ +{"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, INSN2_ALIAS, I1, 0, I37 }, /* bgezal 0 */ +{"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, 0, I37, 0, 0 }, {"bc", "+'", 0xc8000000, 0xfc000000, NODS, 0, I37, 0, 0 }, {"balc", "+'", 0xe8000000, 0xfc000000, WR_31|NODS, 0, I37, 0, 0 }, {"lapc", "s,-A", 0xec000000, 0xfc180000, WR_1, RD_pc, I37, 0, 0 }, @@ -733,8 +734,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"bc1tl", "N,p", 0x45030000, 0xffe30000, RD_CC|CBL|FP_S, 0, I4_32, 0, I37 }, /* bc2* are at the bottom of the table. */ /* bc3* are at the bottom of the table. */ -{"beqz", "s,p", 0x10000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 }, -{"beqzl", "s,p", 0x50000000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, I37 }, +{"beqz", "s,p", 0x10000000, 0xfc1f0000, RD_1|CBD, INSN2_ALIAS, I1, 0, 0 }, +{"beqzl", "s,p", 0x50000000, 0xfc1f0000, RD_1|CBL, INSN2_ALIAS, I2|T3, 0, I37 }, {"beq", "s,t,p", 0x10000000, 0xfc000000, RD_1|RD_2|CBD, 0, I1, 0, 0 }, {"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, 0, I1, 0, 0 }, {"beql", "s,t,p", 0x50000000, 0xfc000000, RD_1|RD_2|CBL, 0, I2|T3, 0, I37 }, @@ -784,8 +785,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"bltzal", "s,p", 0x04100000, 0xfc1f0000, RD_1|WR_31|CBD, 0, I1, 0, I37 }, {"nal", "", 0x04100000, 0xffffffff, WR_31|CBD, 0, I1, 0, 0 }, /* bltzal 0,.+4 */ {"bltzall", "s,p", 0x04120000, 0xfc1f0000, RD_1|WR_31|CBL, 0, I2|T3, 0, I37 }, -{"bnez", "s,p", 0x14000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 }, -{"bnezl", "s,p", 0x54000000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, I37 }, +{"bnez", "s,p", 0x14000000, 0xfc1f0000, RD_1|CBD, INSN2_ALIAS, I1, 0, 0 }, +{"bnezl", "s,p", 0x54000000, 0xfc1f0000, RD_1|CBL, INSN2_ALIAS, I2|T3, 0, I37 }, {"bne", "s,t,p", 0x14000000, 0xfc000000, RD_1|RD_2|CBD, 0, I1, 0, 0 }, {"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, 0, I1, 0, 0 }, {"bnel", "s,t,p", 0x54000000, 0xfc000000, RD_1|RD_2|CBL, 0, I2|T3, 0, I37 },