From: Jim Wilson <wilson@gcc.gnu.org>
Date: Mon, 15 Mar 1993 19:40:34 +0000 (-0800)
Subject: (zero_extendqisi2+4,+5): Add new patterns for combining a SI->QI mode truncate...
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d21a353d96c94d9876e4b5c2921fe29672f0c14b;p=gcc.git

(zero_extendqisi2+4,+5): Add new patterns for combining a SI->QI mode truncate...

(zero_extendqisi2+4,+5): Add new patterns for combining
a SI->QI mode truncate with an insn that sets the condition codes.

From-SVN: r3743
---

diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 5f8afeb5eb3..293893db69e 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -1418,6 +1418,26 @@
   ""
   "andcc %1,0xff,%0"
   [(set_attr "type" "unary")])
+
+;; Similarly, handle SI->QI mode truncation followed by a compare.
+
+(define_insn ""
+  [(set (reg:CC 0)
+	(compare:CC (subreg:QI (match_operand:SI 0 "register_operand" "r") 0)
+		    (const_int 0)))]
+  ""
+  "andcc %0,0xff,%%g0"
+  [(set_attr "type" "compare")])
+
+(define_insn ""
+  [(set (reg:CC 0)
+	(compare:CC (subreg:QI (match_operand:SI 1 "register_operand" "r") 0)
+		    (const_int 0)))
+   (set (match_operand:QI 0 "register_operand" "=r")
+	(match_dup 1))]
+  ""
+  "andcc %1,0xff,%0"
+  [(set_attr "type" "unary")])
 
 ;;- sign extension instructions