From: clairexen <claire@symbioticeda.com>
Date: Mon, 31 Aug 2020 09:58:29 +0000 (+0200)
Subject: Merge pull request #2368 from YosysHQ/verific_portrange
X-Git-Tag: working-ls180~288
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d23e4b4dce31df5baff47a1eda917e6b7df16693;p=yosys.git

Merge pull request #2368 from YosysHQ/verific_portrange

Fix import of VHDL enums
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d23e4b4dce31df5baff47a1eda917e6b7df16693