From: Andrew Cagney <cagney@redhat.com>
Date: Thu, 15 May 1997 02:22:37 +0000 (+0000)
Subject: More floating point operations.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d24f06eef2f3c0816fdae9398f13c0b471efeb18;p=binutils-gdb.git

More floating point operations.
---

diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index e859b9ad209..4f6c9a0cf8d 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,12 @@
+Thu May 15 10:58:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* sim-fpu.h, sim-fpu.c (sim_fpu_[iu]{32,64}to): New integer
+ 	conversion functions.
+	
+	* sim-fpu.h, sim-fpu.c (sim_fpu_is_{lt,le,eq,ne,ge,gt}): New fp
+ 	compare functions.  Replacing.
+	(sim_fpu_cmp): This. Delete.
+	
 Mon May 12 14:49:05 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 
 	* sim-core.c (sim_core_find_mapping): Call engine_error not
diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c
index b02530c33a5..66fe5d160ff 100644
--- a/sim/common/sim-fpu.c
+++ b/sim/common/sim-fpu.c
@@ -29,6 +29,43 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 #include <math.h>
 
 
+/* register <-> sim_fpu */
+
+INLINE_SIM_FPU (sim_fpu)
+sim_fpu_32to (unsigned32 s)
+{
+  sim_fpu ans;
+  ans.val = *(float*) &s;
+  return ans;
+}
+
+
+INLINE_SIM_FPU (sim_fpu)
+sim_fpu_64to (unsigned64 s)
+{
+  sim_fpu ans;
+  ans.val = *(double*) &s;
+  return ans;
+}
+
+
+INLINE_SIM_FPU (unsigned32)
+sim_fpu_to32 (sim_fpu l)
+{
+  float s = l.val;
+  return *(unsigned32*) &s;
+}
+
+
+INLINE_SIM_FPU (unsigned64)
+sim_fpu_to64 (sim_fpu s)
+{
+  return *(unsigned64*) &s.val;
+}
+
+
+/* Arithmetic ops */
+
 INLINE_SIM_FPU (sim_fpu)
 sim_fpu_add (sim_fpu l,
 	     sim_fpu r)
@@ -87,39 +124,46 @@ sim_fpu_sqrt (sim_fpu r)
 }
 
 
+/* int/long -> sim_fpu */
+
 INLINE_SIM_FPU (sim_fpu)
-sim_fpu_32to (unsigned32 s)
+sim_fpu_i32to (signed32 s)
 {
   sim_fpu ans;
-  ans.val = *(float*) &s;
+  ans.val = s;
   return ans;
 }
 
 
 INLINE_SIM_FPU (sim_fpu)
-sim_fpu_64to (unsigned64 s)
+sim_fpu_u32to (unsigned32 s)
 {
   sim_fpu ans;
-  ans.val = *(double*) &s;
+  ans.val = s;
   return ans;
 }
 
 
-INLINE_SIM_FPU (unsigned32)
-sim_fpu_to32 (sim_fpu l)
+INLINE_SIM_FPU (sim_fpu)
+sim_fpu_i64to (signed64 s)
 {
-  float s = l.val;
-  return *(unsigned32*) &s;
+  sim_fpu ans;
+  ans.val = s;
+  return ans;
 }
 
 
-INLINE_SIM_FPU (unsigned64)
-sim_fpu_to64 (sim_fpu s)
+INLINE_SIM_FPU (sim_fpu)
+sim_fpu_u64to (unsigned64 s)
 {
-  return *(unsigned64*) &s.val;
+  sim_fpu ans;
+  ans.val = s;
+  return ans;
 }
 
 
+/* sim_fpu -> host format */
+
 INLINE_SIM_FPU (float)
 sim_fpu_2f (sim_fpu f)
 {
@@ -134,6 +178,7 @@ sim_fpu_2d (sim_fpu s)
 }
 
 
+#if 0
 INLINE_SIM_FPU (sim_fpu)
 sim_fpu_f2 (float f)
 {
@@ -141,8 +186,10 @@ sim_fpu_f2 (float f)
   ans.val = f;
   return ans;
 }
+#endif
 
 
+#if 0
 INLINE_SIM_FPU (sim_fpu)
 sim_fpu_d2 (double d)
 {
@@ -150,7 +197,11 @@ sim_fpu_d2 (double d)
   ans.val = d;
   return ans;
 }
+#endif
+
+
 
+/* General */
 
 INLINE_SIM_FPU (int)
 sim_fpu_is_nan (sim_fpu d)
@@ -159,11 +210,48 @@ sim_fpu_is_nan (sim_fpu d)
 }
 
 
+/* Compare operators */
+
 INLINE_SIM_FPU (int)
-sim_fpu_cmp (sim_fpu l,
-	     sim_fpu r)
+sim_fpu_is_lt (sim_fpu l,
+	       sim_fpu r)
+{
+  return (l.val < r.val);
+}
+
+INLINE_SIM_FPU (int)
+sim_fpu_is_le (sim_fpu l,
+	       sim_fpu r)
+{
+  return (l.val <= r.val);
+}
+
+INLINE_SIM_FPU (int)
+sim_fpu_is_eq (sim_fpu l,
+	       sim_fpu r)
+{
+  return (l.val == r.val);
+}
+
+INLINE_SIM_FPU (int)
+sim_fpu_is_ne (sim_fpu l,
+	       sim_fpu r)
+{
+  return (l.val != r.val);
+}
+
+INLINE_SIM_FPU (int)
+sim_fpu_is_ge (sim_fpu l,
+	       sim_fpu r)
+{
+  return (l.val >= r.val);
+}
+
+INLINE_SIM_FPU (int)
+sim_fpu_is_gt (sim_fpu l,
+	       sim_fpu r)
 {
-  return l.val - r.val;
+  return (l.val > r.val);
 }
 
 #endif
diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h
index a40b4c912f7..72f20e1dd84 100644
--- a/sim/common/sim-fpu.h
+++ b/sim/common/sim-fpu.h
@@ -30,6 +30,16 @@ typedef struct _sim_fpu {
 } sim_fpu;
 
 
+/* Directly map a 32/64bit register quantity into the sim_fpu internal
+   type ready for various arithmetic and conversion operations. */
+
+INLINE_SIM_FPU (sim_fpu) sim_fpu_32to (unsigned32 s);
+INLINE_SIM_FPU (sim_fpu) sim_fpu_64to (unsigned64 s);
+
+INLINE_SIM_FPU (unsigned32) sim_fpu_to32 (sim_fpu s);
+INLINE_SIM_FPU (unsigned64) sim_fpu_to64 (sim_fpu s);
+
+
 /* Arrithmetic operators */
 
 INLINE_SIM_FPU (sim_fpu) sim_fpu_add (sim_fpu l, sim_fpu r);
@@ -40,19 +50,24 @@ INLINE_SIM_FPU (sim_fpu) sim_fpu_inv (sim_fpu l);
 INLINE_SIM_FPU (sim_fpu) sim_fpu_sqrt (sim_fpu sqr);
 
 
-/* Conversions single/double to/from fpu type */
+/* Conversion of integer value into floating point types */
 
-INLINE_SIM_FPU (sim_fpu) sim_fpu_32to (unsigned32 s);
-INLINE_SIM_FPU (sim_fpu) sim_fpu_64to (unsigned64 s);
+INLINE_SIM_FPU (sim_fpu) sim_fpu_i32to (signed32 s);
+INLINE_SIM_FPU (sim_fpu) sim_fpu_u32to (unsigned32 s);
+INLINE_SIM_FPU (sim_fpu) sim_fpu_i64to (signed64 s);
+INLINE_SIM_FPU (sim_fpu) sim_fpu_u64to (unsigned64 s);
 
-INLINE_SIM_FPU (unsigned32) sim_fpu_to32 (sim_fpu s);
-INLINE_SIM_FPU (unsigned64) sim_fpu_to64 (sim_fpu s);
+
+/* Conversion of internal sim_fpu type to host float and double
+   formats - for debuging/tracing */
 
 INLINE_SIM_FPU (float) sim_fpu_2f (sim_fpu f);
 INLINE_SIM_FPU (double) sim_fpu_2d (sim_fpu d);
 
+#if 0
 INLINE_SIM_FPU (sim_fpu) sim_fpu_f2 (float f);
 INLINE_SIM_FPU (sim_fpu) sim_fpu_d2 (double d);
+#endif
 
 
 /* Signalling or NonSignalling NaN */
@@ -62,7 +77,11 @@ INLINE_SIM_FPU (int) sim_fpu_is_nan (sim_fpu s);
 
 /* compare l with r; return <0, ==0, >0 accordingly */
 
-INLINE_SIM_FPU (int) sim_fpu_cmp (sim_fpu l, sim_fpu r);
-
+INLINE_SIM_FPU (int) sim_fpu_is_lt (sim_fpu l, sim_fpu r);
+INLINE_SIM_FPU (int) sim_fpu_is_le (sim_fpu l, sim_fpu r);
+INLINE_SIM_FPU (int) sim_fpu_is_eq (sim_fpu l, sim_fpu r);
+INLINE_SIM_FPU (int) sim_fpu_is_ne (sim_fpu l, sim_fpu r);
+INLINE_SIM_FPU (int) sim_fpu_is_ge (sim_fpu l, sim_fpu r);
+INLINE_SIM_FPU (int) sim_fpu_is_gt (sim_fpu l, sim_fpu r);
 
 #endif