From: Pierre-Eric Pelloux-Prayer Date: Mon, 13 Jul 2020 13:36:25 +0000 (+0200) Subject: radeonsi: adjust epitch for PIPE_FORMAT_R8G8_R8B8_UNORM X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d2a3ca289f5686c6afc238a9530efa16560d83fe;p=mesa.git radeonsi: adjust epitch for PIPE_FORMAT_R8G8_R8B8_UNORM This fix si_compute_copy_image for yuyv image (so using PIPE_FORMAT_R8G8_R8B8_UNORM). With this change, the following gst pipeline produce the expected results for various image sizes (with or without AMD_DEBUG=nodma): gst-launch-1.0 filesrc location=input.jpg ! jpegparse ! vaapijpegdec ! filesink location=output.yuv Reviewed-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák Part-of: --- diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 33d5d5fe063..096234b3efb 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -389,8 +389,18 @@ void si_set_mutable_tex_desc_fields(struct si_screen *sscreen, struct si_texture state[3] |= S_008F1C_SW_MODE(tex->surface.u.gfx9.stencil.swizzle_mode); state[4] |= S_008F20_PITCH(tex->surface.u.gfx9.stencil.epitch); } else { + uint16_t epitch = tex->surface.u.gfx9.surf.epitch; + if (tex->buffer.b.b.format == PIPE_FORMAT_R8G8_R8B8_UNORM && + block_width == 1) { + /* epitch is patched in ac_surface for sdma/vcn blocks to get + * a value expressed in elements unit. + * But here the texture is used with block_width == 1 so we + * need epitch in pixel units. + */ + epitch = (epitch + 1) / tex->surface.blk_w - 1; + } state[3] |= S_008F1C_SW_MODE(tex->surface.u.gfx9.surf.swizzle_mode); - state[4] |= S_008F20_PITCH(tex->surface.u.gfx9.surf.epitch); + state[4] |= S_008F20_PITCH(epitch); } state[5] &=