From: Jordan Justen Date: Wed, 16 Aug 2017 23:45:47 +0000 (-0700) Subject: intel/genxml,isl: Add gen12 depth buffer changes X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d2a490d1d9bdb4de211215fe132e29ea5993ac47;p=mesa.git intel/genxml,isl: Add gen12 depth buffer changes Reworks: * Fix 3DSTATE_DEPTH_BUFFER "Surface Format" end in xml (Jason) * Remove WM_HZ_OP changes (Nanley) Signed-off-by: Jordan Justen Reviewed-by: Nanley Chery --- diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml index 2eab85a2ceb..77fc67098a0 100644 --- a/src/intel/genxml/gen12.xml +++ b/src/intel/genxml/gen12.xml @@ -1571,13 +1571,15 @@ - + + + + - - + @@ -1585,12 +1587,11 @@ - - - + + - - + + @@ -1598,6 +1599,7 @@ + @@ -1877,12 +1879,13 @@ - + + @@ -2966,6 +2969,7 @@ + diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c index d2dec3761e5..66a5fe1b979 100644 --- a/src/intel/isl/isl_emit_depth_stencil.c +++ b/src/intel/isl/isl_emit_depth_stencil.c @@ -130,7 +130,7 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch, #endif if (info->stencil_surf) { -#if GEN_GEN >= 7 +#if GEN_GEN >= 7 && GEN_GEN < 12 db.StencilWriteEnable = true; #endif #if GEN_GEN >= 8 || GEN_IS_HASWELL