From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 15 Aug 2014 00:00:53 +0000 (+0200)
Subject: document "techmap -map %<design-name>"
X-Git-Tag: yosys-0.4~258
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d320e750877a6cf8d5993da6d2cd121fe5b4d78e;p=yosys.git

document "techmap -map %<design-name>"
---

diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 29ce96766..a7f91e862 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -706,6 +706,9 @@ struct TechmapPass : public Pass {
 		log("        transforms the internal RTL cells to the internal gate\n");
 		log("        library.\n");
 		log("\n");
+		log("    -map %%<design-name>\n");
+		log("        like -map above, but with an in-memory design instead of a file.\n");
+		log("\n");
 		log("    -share_map filename\n");
 		log("        like -map, but look for the file in the share directory (where the\n");
 		log("        yosys data files are). this is mainly used internally when techmap\n");