From: Eric Anholt <eric@anholt.net>
Date: Wed, 24 Jun 2009 02:29:35 +0000 (-0700)
Subject: i965: Don't set a reserved bit in MI_FLUSH.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d43599afef046a36ae75a29eaea941eb04929abf;p=mesa.git

i965: Don't set a reserved bit in MI_FLUSH.

I noticed this when this MI_FLUSH showed up in IPEHR for the ut2004 hang.
Not setting the reserved bit didn't help, though.
---

diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index ba03afd6c13..b284e623d01 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -194,7 +194,7 @@ static GLuint brw_flush_cmd( void )
    struct brw_mi_flush flush;
    flush.opcode = CMD_MI_FLUSH;
    flush.pad = 0;
-   flush.flags = BRW_FLUSH_READ_CACHE | BRW_FLUSH_STATE_CACHE;
+   flush.flags = BRW_FLUSH_STATE_CACHE;
    return *(GLuint *)&flush;
 }