From: Dmitry Selyutin Date: Tue, 6 Sep 2022 11:51:18 +0000 (+0300) Subject: power_insn: stricter reg type check X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d44d4acd0cbef9d81716f7f21e642593ddb995c2;p=openpower-isa.git power_insn: stricter reg type check --- diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index 4e054681..50889fe5 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -532,7 +532,7 @@ class DynamicOperandReg(DynamicOperand): "in1", "in2", "in3", "cr_in", "out", "out2", "cr_out", }): - if self.extra_reg == record.svp64.extra_reg(key): + if self.extra_reg is record.svp64.extra_reg(key): return record.extra_idx(key) return _SVExtra.NONE