From: Luke Kenneth Casson Leighton Date: Sat, 5 Sep 2020 20:25:56 +0000 (+0100) Subject: move GPIO IRQ to 15 to match microwatt modifications X-Git-Tag: semi_working_ecp5~178 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d46686e3b0d2be1db9175828d210809fa52915ba;p=soc.git move GPIO IRQ to 15 to match microwatt modifications --- diff --git a/src/soc/litex/florent/libresoc/core.py b/src/soc/litex/florent/libresoc/core.py index b0760b81..311e8cfa 100644 --- a/src/soc/litex/florent/libresoc/core.py +++ b/src/soc/litex/florent/libresoc/core.py @@ -51,7 +51,7 @@ class LibreSoC(CPU): self.platform = platform self.variant = variant self.reset = Signal() - self.interrupt = Signal(16) + self.interrupt = Signal(4) if variant == "standard32": self.data_width = 32 diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py index d2b573bb..58c9769b 100644 --- a/src/soc/simple/issuer.py +++ b/src/soc/simple/issuer.py @@ -121,9 +121,9 @@ class TestIssuer(Elaboratable): if self.gpio: m.submodules.simple_gpio = simple_gpio = self.simple_gpio - # connect one GPIO output to ICS bit 5 (like in microwatt soc.vhdl) + # connect one GPIO output to ICS bit 15 (like in microwatt soc.vhdl) if self.gpio and self.xics: - comb += self.int_level_i[5].eq(simple_gpio.gpio_o[0]) + comb += self.int_level_i[15].eq(simple_gpio.gpio_o[0]) # instruction decoder pdecode = create_pdecode()