From: Sagar Ghuge <sagar.ghuge@intel.com>
Date: Fri, 29 May 2020 23:44:42 +0000 (-0700)
Subject: intel/compiler: Optimize integer add with 0 into mov
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d4f3f9390f07791e8c44e05386d1005d2bdb979f;p=mesa.git

intel/compiler: Optimize integer add with 0 into mov

Kaby Lake
total instructions in shared programs: 326560 -> 323616 (-0.90%)
instructions in affected programs: 178062 -> 175118 (-1.65%)
helped: 129
HURT: 0
helped stats (abs) min: 1 max: 118 x̄: 22.82 x̃: 8
helped stats (rel) min: 0.35% max: 6.56% x̄: 2.57% x̃: 2.47%
95% mean confidence interval for instructions value: -27.71 -17.93
95% mean confidence interval for instructions %-change: -2.81% -2.32%
Instructions are helped.

total cycles in shared programs: 43741127 -> 45397851 (3.79%)
cycles in affected programs: 40880261 -> 42536985 (4.05%)
helped: 94
HURT: 34
helped stats (abs) min: 5 max: 6160 x̄: 598.91 x̃: 45
helped stats (rel) min: 0.20% max: 34.86% x̄: 2.52% x̃: 1.09%
HURT stats (abs)   min: 1 max: 76198 x̄: 50383.00 x̃: 69677
HURT stats (rel)   min: 0.07% max: 48.41% x̄: 15.65% x̃: 6.49%
95% mean confidence interval for cycles value: 8023.10 17863.21
95% mean confidence interval for cycles %-change: <.01% 4.60%
Cycles are HURT.

total spills in shared programs: 1086 -> 978 (-9.94%)
spills in affected programs: 897 -> 789 (-12.04%)
helped: 24
HURT: 0

total fills in shared programs: 1686 -> 1584 (-6.05%)
fills in affected programs: 1371 -> 1269 (-7.44%)
helped: 24
HURT: 0

v2:
- Use brw_reg_type_is_integer (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5341>
---

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 514acc88b33..1b0327e157e 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -2711,6 +2711,14 @@ fs_visitor::opt_algebraic()
          if (inst->src[1].file != IMM)
             continue;
 
+         if (brw_reg_type_is_integer(inst->src[1].type) &&
+             inst->src[1].is_zero()) {
+            inst->opcode = BRW_OPCODE_MOV;
+            inst->src[1] = reg_undef;
+            progress = true;
+            break;
+         }
+
          if (inst->src[0].file == IMM) {
             assert(inst->src[0].type == BRW_REGISTER_TYPE_F);
             inst->opcode = BRW_OPCODE_MOV;