From: Jacob Lifshay Date: Sat, 15 Apr 2023 01:56:33 +0000 (-0700) Subject: reword fmv[f/t]gs as requested by feedback X-Git-Tag: opf_rfc_ls008_v1~1 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d4f8c834818adc2904ee98ff13e4a70ae31e028e;p=libreriscv.git reword fmv[f/t]gs as requested by feedback --- diff --git a/openpower/sv/int_fp_mv/moves_and_conversions.mdwn b/openpower/sv/int_fp_mv/moves_and_conversions.mdwn index 11468dc4a..d51f68b23 100644 --- a/openpower/sv/int_fp_mv/moves_and_conversions.mdwn +++ b/openpower/sv/int_fp_mv/moves_and_conversions.mdwn @@ -81,9 +81,10 @@ Special Registers altered: RT <- [0] * 32 || SINGLE((FRB)) # SINGLE since that's what stfs uses ``` -Move a 32-bit float from a FPR to a GPR, just copying bits of the IEEE 754 -representation directly. This is equivalent to `stfs` followed by `lwz`. -As `fmvtgs` is just copying bits, `FPSCR` is not affected in any way. +Move a BFP32 from a FPR to a GPR, by using `SINGLE` to extract the standard +`BFP32` form from FRB and zero-extending the result to 64-bits and storing to +RT. This is equivalent to `stfs` followed by `lwz`. +As `fmvtgs` is just copying the BFP32 form, `FPSCR` is not affected in any way. Rc=1 tests RT and sets CR0, exactly like all other Scalar Fixed-Point operations. @@ -143,9 +144,10 @@ Special Registers altered: FRT <- DOUBLE((RB)[32:63]) # DOUBLE since that's what lfs uses ``` -move a 32-bit float from a GPR to a FPR, just copying bits of the IEEE 754 -representation directly. This is equivalent to `stw` followed by `lfs`. -As `fmvfgs` is just copying bits, `FPSCR` is not affected in any way. +Move a BFP32 from a GPR to a FPR, by using `DOUBLE` on the least significant +32-bits of RB to do the standard BFP32 in BFP64 trick and store the result in +FRT. This is equivalent to `stw` followed by `lfs`. +As `fmvfgs` is just copying the BFP32 form, `FPSCR` is not affected in any way. Rc=1 tests FRT and sets CR1, exactly like all other Scalar Floating-Point operations.