From: colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 <colepoirier@web>
Date: Tue, 23 Jun 2020 21:44:09 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~2419
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d5159d7e8d37d4a96afaa9cc7b4176bbf20549c6;p=libreriscv.git

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diff --git a/cole.mdwn b/cole.mdwn
index 9addee630..6bd1088b8 100644
--- a/cole.mdwn
+++ b/cole.mdwn
@@ -8,10 +8,15 @@ List of things that need more fleshed out bug reports:
 
 * Convert hand-drawn 180nm Test ASIC's Memory Layout diagram into editable SVG
 * Memory bus/L1/L2 Cache documentation  (bug #397)
+
 * Bperm tutorial
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 * Bugseverywhere (or also https://github.com/MichaelMure/git-bug/blob/master/bug/bug.go)
+
 * Competition to LS: Skywater 130nm production-ready PDK gets opensourced (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008254.html)
 
 * Scoreboard documentation (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html)
+
 * LDST documentation (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html)
+
 * Follow up with graphics engineers, esp ones Yehowshua has already reached out to (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008283.html)