From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 12 May 2021 13:35:55 +0000 (+0100)
Subject: whoops missing default zero (no idea how)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d51f4c50de8af0978166112dfc19164736aa7748;p=soc.git

whoops missing default zero (no idea how)
---

diff --git a/src/soc/experiment/test/test_mmu_dcache_pi.py b/src/soc/experiment/test/test_mmu_dcache_pi.py
index ea342ba3..a19d9cc5 100644
--- a/src/soc/experiment/test/test_mmu_dcache_pi.py
+++ b/src/soc/experiment/test/test_mmu_dcache_pi.py
@@ -164,7 +164,7 @@ def wb_get(dc):
         if addr not in mem:
             print ("    WB LOOKUP NO entry @ %x, returning zero" % (addr))
 
-        data = mem.get(addr)
+        data = mem.get(addr, 0)
         yield dc.wb_in.dat.eq(data)
         print ("    DCACHE get %x data %x" % (addr, data))
         yield dc.wb_in.ack.eq(1)
@@ -176,9 +176,9 @@ def mmu_lookup(dut, addr):
     mmu = dut.mmu
     global stop
 
-    print("pi_st")
+    print("pi_ld")
     yield from pi_ld(dut.pi, addr, 1)
-    print("pi_st_done")
+    print("pi_ld done")
     """
     # original test code kept for reference
     while not stop: # wait for dc_valid / err