From: Andrew Waterman <waterman@eecs.berkeley.edu>
Date: Tue, 29 Oct 2013 03:37:39 +0000 (-0700)
Subject: Pass target machine's return code back to OS
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d5204838b7a09225047ba3eaf707f1db9207cbe3;p=riscv-isa-sim.git

Pass target machine's return code back to OS
---

diff --git a/riscv/sim.cc b/riscv/sim.cc
index 4d61555..c800e87 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -72,7 +72,7 @@ reg_t sim_t::get_scr(int which)
   }
 }
 
-void sim_t::run()
+int sim_t::run()
 {
   while (htif->tick())
   {
@@ -81,6 +81,7 @@ void sim_t::run()
     else
       step(INTERLEAVE);
   }
+  return htif->exit_code();
 }
 
 void sim_t::step(size_t n)
diff --git a/riscv/sim.h b/riscv/sim.h
index e827087..34ed6e8 100644
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -19,7 +19,7 @@ public:
   ~sim_t();
 
   // run the simulation to completion
-  void run();
+  int run();
   bool running();
   void stop();
   void set_debug(bool value);
diff --git a/riscv/spike.cc b/riscv/spike.cc
index fb2b7da..da564b5 100644
--- a/riscv/spike.cc
+++ b/riscv/spike.cc
@@ -68,5 +68,5 @@ int main(int argc, char** argv)
   }
 
   s.set_debug(debug);
-  s.run();
+  return s.run();
 }