From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Tue, 3 Nov 2015 10:45:23 +0000 (+0800)
Subject: interconnect/wishbone: fix CSRBank init
X-Git-Tag: 24jan2021_ls180~2106^2~5
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d554a06eba49bfc096d38c8d51fc354c7e21cfa6;p=litex.git

interconnect/wishbone: fix CSRBank init
---

diff --git a/misoc/interconnect/wishbone.py b/misoc/interconnect/wishbone.py
index 990908dd..d24148be 100644
--- a/misoc/interconnect/wishbone.py
+++ b/misoc/interconnect/wishbone.py
@@ -641,7 +641,7 @@ class CSRBank(csr.GenericBank):
 
         ###
 
-        GenericBank.__init__(self, description, len(self.bus.dat_w))
+        csr.GenericBank.__init__(self, description, len(self.bus.dat_w))
 
         for i, c in enumerate(self.simple_csrs):
             self.comb += [