From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 6 Sep 2016 15:35:06 +0000 (+0200)
Subject: Bugfix in parsing of BLIF latch init values
X-Git-Tag: yosys-0.7~78
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d55a93b39ff331aea16d627de92b1cbee2be68db;p=yosys.git

Bugfix in parsing of BLIF latch init values
---

diff --git a/frontends/blif/blifparse.cc b/frontends/blif/blifparse.cc
index 1f6d0ee37..3717a1e5e 100644
--- a/frontends/blif/blifparse.cc
+++ b/frontends/blif/blifparse.cc
@@ -241,7 +241,7 @@ void parse_blif(RTLIL::Design *design, std::istream &f, std::string dff_name, bo
 				}
 
 				if (init != nullptr && (init[0] == '0' || init[0] == '1'))
-					blif_wire(d)->attributes["\\init"] = Const(init[0] == '1' ? 1 : 0, 1);
+					blif_wire(q)->attributes["\\init"] = Const(init[0] == '1' ? 1 : 0, 1);
 
 				if (clock == nullptr)
 					goto no_latch_clock;