From: Richard Earnshaw Date: Tue, 17 Aug 2004 23:38:53 +0000 (+0000) Subject: arm.md (addsi3, [...]): Rework to avoid use of preserve_subexpressions_p. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d56993f2920b9a9a5e71359cbdeae79966afae3d;p=gcc.git arm.md (addsi3, [...]): Rework to avoid use of preserve_subexpressions_p. * arm.md (addsi3, subsi3, andsi3, iorsi3, movsi, movhi): Rework to avoid use of preserve_subexpressions_p. From-SVN: r86159 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3e3252d7633..e8108e5086b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-08-18 Richard Earnshaw + + * arm.md (addsi3, subsi3, andsi3, iorsi3, movsi, movhi): Rework to + avoid use of preserve_subexpressions_p. + 2004-08-17 Richard Henderson PR 17051 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 26ac27899e2..351ce2bf458 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -449,7 +449,7 @@ { arm_split_constant (PLUS, SImode, NULL_RTX, INTVAL (operands[2]), operands[0], operands[1], - (no_new_pseudos ? 0 : preserve_subexpressions_p ())); + optimize && !no_new_pseudos); DONE; } " @@ -935,9 +935,7 @@ { arm_split_constant (MINUS, SImode, NULL_RTX, INTVAL (operands[1]), operands[0], - operands[2], - (no_new_pseudos ? 0 - : preserve_subexpressions_p ())); + operands[2], optimize && !no_new_pseudos); DONE; } else /* TARGET_THUMB */ @@ -1512,9 +1510,8 @@ { arm_split_constant (AND, SImode, NULL_RTX, INTVAL (operands[2]), operands[0], - operands[1], - (no_new_pseudos - ? 0 : preserve_subexpressions_p ())); + operands[1], optimize && !no_new_pseudos); + DONE; } } @@ -2167,8 +2164,7 @@ { arm_split_constant (IOR, SImode, NULL_RTX, INTVAL (operands[2]), operands[0], operands[1], - (no_new_pseudos - ? 0 : preserve_subexpressions_p ())); + optimize && !no_new_pseudos); DONE; } else /* TARGET_THUMB */ @@ -4256,8 +4252,7 @@ { arm_split_constant (SET, SImode, NULL_RTX, INTVAL (operands[1]), operands[0], NULL_RTX, - (no_new_pseudos ? 0 - : preserve_subexpressions_p ())); + optimize && !no_new_pseudos); DONE; } } @@ -4653,7 +4648,7 @@ emit_insn (gen_movsi (reg, GEN_INT (val))); operands[1] = gen_lowpart (HImode, reg); } - else if (arm_arch4 && !no_new_pseudos && optimize > 0 + else if (arm_arch4 && optimize && !no_new_pseudos && GET_CODE (operands[1]) == MEM) { rtx reg = gen_reg_rtx (SImode);