From: lkcl <lkcl@web>
Date: Wed, 25 May 2022 13:17:48 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2092
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d578470df9108378d2811643265d156a2c914a33;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index 80544dc38..ed017bd28 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -170,12 +170,24 @@ lower 16-bits.
 
 Pseudocode:
 
-    fp32 = FRS[48:63] || d0 || d1 || d2
+    fp32 = FRS[0:15] || d0 || d1 || d2
     FRS = Single_to_Double(fp32)
 
 *This instruction performs a Read-Modify-Write. FRS is read, the additional
 16 bit immediate inserted, and the result also written to FRS*
 
+Example:
+
+```
+# these two combined instructions write 0x3f808000
+# into f4 as an FP32 to be converted to an FP64.
+# actual contents in f4 will be 0x3f80_8000_0000_0000
+# first the upper bits, happens to be +1.0
+fmvis f4, 0x3F80 # writes +1.0 to f4
+# now write the lower 16 bits of an FP32
+fishmv f4, 0x8000 # writes +1.0039063 to f4
+```
+
 # Moves
 
 These instructions perform a straight unaltered bit-level copy from one Register