From: Andreas Sandberg <andreas.sandberg@arm.com>
Date: Fri, 20 Nov 2015 20:50:17 +0000 (-0600)
Subject: cpu: Enforce 1 interrupt controller per thread
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d57a855e40e5d85024ce4a5dd31ad1e45897ee04;p=gem5.git

cpu: Enforce 1 interrupt controller per thread

Consider it a fatal configuration error if the number of interrupt
controllers doesn't match the number of threads in an SMT
configuration.
---

diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index a1dfa42ce..9ba7e08a7 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -237,14 +237,12 @@ BaseCPU::BaseCPU(Params *p, bool is_checker)
     // The interrupts should always be present unless this CPU is
     // switched in later or in case it is a checker CPU
     if (!params()->switched_out && !is_checker) {
-        if (!interrupts.empty()) {
-            for (ThreadID tid = 0; tid < numThreads; tid++) {
-                interrupts[tid]->setCPU(this);
-            }
-        } else {
-            fatal("CPU %s has no interrupt controller.\n"
-                  "Ensure createInterruptController() is called.\n", name());
-        }
+        fatal_if(interrupts.size() != numThreads,
+                 "CPU %s has %i interrupt controllers, but is expecting one "
+                 "per thread (%i)\n",
+                 name(), interrupts.size(), numThreads);
+        for (ThreadID tid = 0; tid < numThreads; tid++)
+            interrupts[tid]->setCPU(this);
     }
 
     if (FullSystem) {