From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 12 Feb 2015 00:30:17 +0000 (+0100)
Subject: code cleanup
X-Git-Tag: 24jan2021_ls180~2604^2~26
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d5887416f16e0210061c6c6d6e39cb978eebe8e7;p=litex.git

code cleanup
---

diff --git a/liteeth/core/arp/__init__.py b/liteeth/core/arp/__init__.py
index 58b7aa89..638505c3 100644
--- a/liteeth/core/arp/__init__.py
+++ b/liteeth/core/arp/__init__.py
@@ -10,14 +10,6 @@ _arp_table_layout = [
 		("mac_address", 48)
 	]
 
-class LiteEthARPDepacketizer(LiteEthDepacketizer):
-	def __init__(self):
-		LiteEthDepacketizer.__init__(self,
-			eth_mac_description(8),
-			eth_arp_description(8),
-			arp_header,
-			arp_header_len)
-
 class LiteEthARPPacketizer(LiteEthPacketizer):
 	def __init__(self):
 		LiteEthPacketizer.__init__(self,
@@ -80,6 +72,14 @@ class LiteEthARPTX(Module):
 			)
 		)
 
+class LiteEthARPDepacketizer(LiteEthDepacketizer):
+	def __init__(self):
+		LiteEthDepacketizer.__init__(self,
+			eth_mac_description(8),
+			eth_arp_description(8),
+			arp_header,
+			arp_header_len)
+
 class LiteEthARPRX(Module):
 	def __init__(self, mac_address, ip_address):
 		self.sink = sink = Sink(eth_mac_description(8))
diff --git a/liteeth/core/icmp/__init__.py b/liteeth/core/icmp/__init__.py
index 79c51925..0af3b624 100644
--- a/liteeth/core/icmp/__init__.py
+++ b/liteeth/core/icmp/__init__.py
@@ -3,14 +3,6 @@ from liteeth.generic import *
 from liteeth.generic.depacketizer import LiteEthDepacketizer
 from liteeth.generic.packetizer import LiteEthPacketizer
 
-class LiteEthICMPDepacketizer(LiteEthDepacketizer):
-	def __init__(self):
-		LiteEthDepacketizer.__init__(self,
-			eth_ipv4_user_description(8),
-			eth_icmp_description(8),
-			icmp_header,
-			icmp_header_len)
-
 class LiteEthICMPPacketizer(LiteEthPacketizer):
 	def __init__(self):
 		LiteEthPacketizer.__init__(self,
@@ -55,6 +47,14 @@ class LiteEthICMPTX(Module):
 			)
 		)
 
+class LiteEthICMPDepacketizer(LiteEthDepacketizer):
+	def __init__(self):
+		LiteEthDepacketizer.__init__(self,
+			eth_ipv4_user_description(8),
+			eth_icmp_description(8),
+			icmp_header,
+			icmp_header_len)
+
 class LiteEthICMPRX(Module):
 	def __init__(self, ip_address):
 		self.sink = sink = Sink(eth_ipv4_user_description(8))
diff --git a/liteeth/core/ip/__init__.py b/liteeth/core/ip/__init__.py
index 17f854cb..4e24f186 100644
--- a/liteeth/core/ip/__init__.py
+++ b/liteeth/core/ip/__init__.py
@@ -1,6 +1,17 @@
 from liteeth.common import *
 from liteeth.generic import *
-from liteeth.core.ip.common import *
+from liteeth.core.ip.checksum import *
+from liteeth.core.ip.crossbar import *
+from liteeth.generic.depacketizer import LiteEthDepacketizer
+from liteeth.generic.packetizer import LiteEthPacketizer
+
+class LiteEthIPV4Packetizer(LiteEthPacketizer):
+	def __init__(self):
+		LiteEthPacketizer.__init__(self,
+			eth_ipv4_description(8),
+			eth_mac_description(8),
+			ipv4_header,
+			ipv4_header_len)
 
 class LiteEthIPTX(Module):
 	def __init__(self, mac_address, ip_address, arp_table):
@@ -81,6 +92,14 @@ class LiteEthIPTX(Module):
 			)
 		)
 
+class LiteEthIPV4Depacketizer(LiteEthDepacketizer):
+	def __init__(self):
+		LiteEthDepacketizer.__init__(self,
+			eth_mac_description(8),
+			eth_ipv4_description(8),
+			ipv4_header,
+			ipv4_header_len)
+
 class LiteEthIPRX(Module):
 	def __init__(self, mac_address, ip_address):
 		self.sink = sink = Sink(eth_mac_description(8))
diff --git a/liteeth/core/ip/checksum.py b/liteeth/core/ip/checksum.py
new file mode 100644
index 00000000..f0e187e6
--- /dev/null
+++ b/liteeth/core/ip/checksum.py
@@ -0,0 +1,43 @@
+from liteeth.common import *
+from liteeth.generic import *
+
+class LiteEthIPV4Checksum(Module):
+	def __init__(self, words_per_clock_cycle=1, skip_checksum=False):
+		self.reset = Signal() # XXX FIXME InsertReset generates incorrect verilog
+		self.ce = Signal()    # XXX FIXME InsertCE generates incorrect verilog
+		self.header = Signal(ipv4_header_len*8)
+		self.value = Signal(16)
+		self.done = Signal()
+		###
+		s = Signal(17)
+		r = Signal(17)
+		n_cycles = 0
+		for i in range(ipv4_header_len//2):
+			if skip_checksum and (i == ipv4_header["checksum"].byte//2):
+				pass
+			else:
+				s_next = Signal(17)
+				r_next = Signal(17)
+				self.comb += s_next.eq(r + self.header[i*16:(i+1)*16])
+				r_next_eq = r_next.eq(Cat(s_next[:16]+s_next[16], Signal()))
+				if (i%words_per_clock_cycle) != 0:
+					self.comb += r_next_eq
+				else:
+					self.sync += \
+						If(self.reset,
+							r_next.eq(0)
+						).Elif(self.ce & ~self.done,
+							r_next_eq
+						)
+					n_cycles += 1
+				s, r = s_next, r_next
+		self.comb += self.value.eq(~Cat(r[8:16], r[:8]))
+
+		if not skip_checksum:
+			n_cycles += 1
+		self.submodules.counter = counter = Counter(max=n_cycles+1)
+		self.comb += [
+			counter.reset.eq(self.reset),
+			counter.ce.eq(self.ce & ~self.done),
+			self.done.eq(counter.value == n_cycles)
+		]
diff --git a/liteeth/core/ip/common.py b/liteeth/core/ip/common.py
deleted file mode 100644
index 8f27cdd5..00000000
--- a/liteeth/core/ip/common.py
+++ /dev/null
@@ -1,89 +0,0 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
-from liteeth.generic.crossbar import LiteEthCrossbar
-
-class LiteEthIPV4Depacketizer(LiteEthDepacketizer):
-	def __init__(self):
-		LiteEthDepacketizer.__init__(self,
-			eth_mac_description(8),
-			eth_ipv4_description(8),
-			ipv4_header,
-			ipv4_header_len)
-
-class LiteEthIPV4Packetizer(LiteEthPacketizer):
-	def __init__(self):
-		LiteEthPacketizer.__init__(self,
-			eth_ipv4_description(8),
-			eth_mac_description(8),
-			ipv4_header,
-			ipv4_header_len)
-
-class LiteEthIPV4MasterPort:
-	def __init__(self, dw):
-		self.dw = dw
-		self.source = Source(eth_ipv4_user_description(dw))
-		self.sink = Sink(eth_ipv4_user_description(dw))
-
-class LiteEthIPV4SlavePort:
-	def __init__(self, dw):
-		self.dw = dw
-		self.sink = Sink(eth_ipv4_user_description(dw))
-		self.source = Source(eth_ipv4_user_description(dw))
-
-class LiteEthIPV4UserPort(LiteEthIPV4SlavePort):
-	def __init__(self, dw):
-		LiteEthIPV4SlavePort.__init__(self, dw)
-
-class LiteEthIPV4Crossbar(LiteEthCrossbar):
-	def __init__(self):
-		LiteEthCrossbar.__init__(self, LiteEthIPV4MasterPort, "protocol")
-
-	def get_port(self, protocol):
-		if protocol in self.users.keys():
-			raise ValueError("Protocol {0:#x} already assigned".format(protocol))
-		port = LiteEthIPV4UserPort(8)
-		self.users[protocol] = port
-		return port
-
-class LiteEthIPV4Checksum(Module):
-	def __init__(self, words_per_clock_cycle=1, skip_checksum=False):
-		self.reset = Signal() # XXX FIXME InsertReset generates incorrect verilog
-		self.ce = Signal()    # XXX FIXME InsertCE generates incorrect verilog
-		self.header = Signal(ipv4_header_len*8)
-		self.value = Signal(16)
-		self.done = Signal()
-		###
-		s = Signal(17)
-		r = Signal(17)
-		n_cycles = 0
-		for i in range(ipv4_header_len//2):
-			if skip_checksum and (i == ipv4_header["checksum"].byte//2):
-				pass
-			else:
-				s_next = Signal(17)
-				r_next = Signal(17)
-				self.comb += s_next.eq(r + self.header[i*16:(i+1)*16])
-				r_next_eq = r_next.eq(Cat(s_next[:16]+s_next[16], Signal()))
-				if (i%words_per_clock_cycle) != 0:
-					self.comb += r_next_eq
-				else:
-					self.sync += \
-						If(self.reset,
-							r_next.eq(0)
-						).Elif(self.ce & ~self.done,
-							r_next_eq
-						)
-					n_cycles += 1
-				s, r = s_next, r_next
-		self.comb += self.value.eq(~Cat(r[8:16], r[:8]))
-
-		if not skip_checksum:
-			n_cycles += 1
-		self.submodules.counter = counter = Counter(max=n_cycles+1)
-		self.comb += [
-			counter.reset.eq(self.reset),
-			counter.ce.eq(self.ce & ~self.done),
-			self.done.eq(counter.value == n_cycles)
-		]
diff --git a/liteeth/core/ip/crossbar.py b/liteeth/core/ip/crossbar.py
new file mode 100644
index 00000000..19e88b2e
--- /dev/null
+++ b/liteeth/core/ip/crossbar.py
@@ -0,0 +1,30 @@
+from liteeth.common import *
+from liteeth.generic import *
+from liteeth.generic.crossbar import LiteEthCrossbar
+
+class LiteEthIPV4MasterPort:
+	def __init__(self, dw):
+		self.dw = dw
+		self.source = Source(eth_ipv4_user_description(dw))
+		self.sink = Sink(eth_ipv4_user_description(dw))
+
+class LiteEthIPV4SlavePort:
+	def __init__(self, dw):
+		self.dw = dw
+		self.sink = Sink(eth_ipv4_user_description(dw))
+		self.source = Source(eth_ipv4_user_description(dw))
+
+class LiteEthIPV4UserPort(LiteEthIPV4SlavePort):
+	def __init__(self, dw):
+		LiteEthIPV4SlavePort.__init__(self, dw)
+
+class LiteEthIPV4Crossbar(LiteEthCrossbar):
+	def __init__(self):
+		LiteEthCrossbar.__init__(self, LiteEthIPV4MasterPort, "protocol")
+
+	def get_port(self, protocol):
+		if protocol in self.users.keys():
+			raise ValueError("Protocol {0:#x} already assigned".format(protocol))
+		port = LiteEthIPV4UserPort(8)
+		self.users[protocol] = port
+		return port
diff --git a/liteeth/core/udp/__init__.py b/liteeth/core/udp/__init__.py
index 1bac7b72..1873d76f 100644
--- a/liteeth/core/udp/__init__.py
+++ b/liteeth/core/udp/__init__.py
@@ -1,6 +1,16 @@
 from liteeth.common import *
 from liteeth.generic import *
-from liteeth.core.udp.common import *
+from liteeth.core.udp.crossbar import *
+from liteeth.generic.depacketizer import LiteEthDepacketizer
+from liteeth.generic.packetizer import LiteEthPacketizer
+
+class LiteEthUDPPacketizer(LiteEthPacketizer):
+	def __init__(self):
+		LiteEthPacketizer.__init__(self,
+			eth_udp_description(8),
+			eth_ipv4_user_description(8),
+			udp_header,
+			udp_header_len)
 
 class LiteEthUDPTX(Module):
 	def __init__(self, ip_address):
@@ -38,6 +48,14 @@ class LiteEthUDPTX(Module):
 			)
 		)
 
+class LiteEthUDPDepacketizer(LiteEthDepacketizer):
+	def __init__(self):
+		LiteEthDepacketizer.__init__(self,
+			eth_ipv4_user_description(8),
+			eth_udp_description(8),
+			udp_header,
+			udp_header_len)
+
 class LiteEthUDPRX(Module):
 	def __init__(self, ip_address):
 		self.sink = sink = Sink(eth_ipv4_user_description(8))
diff --git a/liteeth/core/udp/common.py b/liteeth/core/udp/common.py
deleted file mode 100644
index c5a2d472..00000000
--- a/liteeth/core/udp/common.py
+++ /dev/null
@@ -1,64 +0,0 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
-from liteeth.generic.crossbar import LiteEthCrossbar
-
-class LiteEthUDPDepacketizer(LiteEthDepacketizer):
-	def __init__(self):
-		LiteEthDepacketizer.__init__(self,
-			eth_ipv4_user_description(8),
-			eth_udp_description(8),
-			udp_header,
-			udp_header_len)
-
-class LiteEthUDPPacketizer(LiteEthPacketizer):
-	def __init__(self):
-		LiteEthPacketizer.__init__(self,
-			eth_udp_description(8),
-			eth_ipv4_user_description(8),
-			udp_header,
-			udp_header_len)
-
-class LiteEthUDPMasterPort:
-	def __init__(self, dw):
-		self.dw = dw
-		self.source = Source(eth_udp_user_description(dw))
-		self.sink = Sink(eth_udp_user_description(dw))
-
-class LiteEthUDPSlavePort:
-	def __init__(self, dw):
-		self.dw =dw
-		self.sink = Sink(eth_udp_user_description(dw))
-		self.source = Source(eth_udp_user_description(dw))
-
-class LiteEthUDPUserPort(LiteEthUDPSlavePort):
-	def __init__(self, dw):
-		LiteEthUDPSlavePort.__init__(self, dw)
-
-class LiteEthUDPCrossbar(LiteEthCrossbar):
-	def __init__(self):
-		LiteEthCrossbar.__init__(self, LiteEthUDPMasterPort, "dst_port")
-
-	def get_port(self, udp_port, dw=8):
-		if udp_port in self.users.keys():
-			raise ValueError("Port {0:#x} already assigned".format(udp_port))
-		user_port = LiteEthUDPUserPort(dw)
-		internal_port = LiteEthUDPUserPort(8)
-		if dw != 8:
-			converter = Converter(eth_udp_user_description(user_port.dw), eth_udp_user_description(8))
-			self.submodules += converter
-			self.comb += [
-				Record.connect(user_port.sink, converter.sink),
-				Record.connect(converter.source, internal_port.sink)
-			]
-			converter = Converter(eth_udp_user_description(8), eth_udp_user_description(user_port.dw))
-			self.submodules += converter
-			self.comb += [
-				Record.connect(internal_port.source, converter.sink),
-				Record.connect(converter.source, user_port.source)
-			]
-			self.users[udp_port] = internal_port
-		else:
-			self.users[udp_port] = user_port
-		return user_port
diff --git a/liteeth/core/udp/crossbar.py b/liteeth/core/udp/crossbar.py
new file mode 100644
index 00000000..82843498
--- /dev/null
+++ b/liteeth/core/udp/crossbar.py
@@ -0,0 +1,47 @@
+from liteeth.common import *
+from liteeth.generic import *
+
+from liteeth.generic.crossbar import LiteEthCrossbar
+
+class LiteEthUDPMasterPort:
+	def __init__(self, dw):
+		self.dw = dw
+		self.source = Source(eth_udp_user_description(dw))
+		self.sink = Sink(eth_udp_user_description(dw))
+
+class LiteEthUDPSlavePort:
+	def __init__(self, dw):
+		self.dw =dw
+		self.sink = Sink(eth_udp_user_description(dw))
+		self.source = Source(eth_udp_user_description(dw))
+
+class LiteEthUDPUserPort(LiteEthUDPSlavePort):
+	def __init__(self, dw):
+		LiteEthUDPSlavePort.__init__(self, dw)
+
+class LiteEthUDPCrossbar(LiteEthCrossbar):
+	def __init__(self):
+		LiteEthCrossbar.__init__(self, LiteEthUDPMasterPort, "dst_port")
+
+	def get_port(self, udp_port, dw=8):
+		if udp_port in self.users.keys():
+			raise ValueError("Port {0:#x} already assigned".format(udp_port))
+		user_port = LiteEthUDPUserPort(dw)
+		internal_port = LiteEthUDPUserPort(8)
+		if dw != 8:
+			converter = Converter(eth_udp_user_description(user_port.dw), eth_udp_user_description(8))
+			self.submodules += converter
+			self.comb += [
+				Record.connect(user_port.sink, converter.sink),
+				Record.connect(converter.source, internal_port.sink)
+			]
+			converter = Converter(eth_udp_user_description(8), eth_udp_user_description(user_port.dw))
+			self.submodules += converter
+			self.comb += [
+				Record.connect(internal_port.source, converter.sink),
+				Record.connect(converter.source, user_port.source)
+			]
+			self.users[udp_port] = internal_port
+		else:
+			self.users[udp_port] = user_port
+		return user_port