From: Jason Ekstrand Date: Wed, 1 Mar 2017 19:20:25 +0000 (-0800) Subject: i965: Move intel_debug.h to intel/common/gen_debug.h X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d5b355ce5fd6dbff61f1f471c38aa62db9d621c4;p=mesa.git i965: Move intel_debug.h to intel/common/gen_debug.h This is shared between the Vulkan and GL drivers as it's a requirement of the back-end compiler. However, it doesn't really belong in the compiler. We rename the file to match the prefix of the other stuff in common and because libdrm defines an intel_debug.h and this avoids a pile of possible name conflicts. Reviewed-by: Anuj Phogat --- diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources index be6bdef7b69..240371261e1 100644 --- a/src/intel/Makefile.sources +++ b/src/intel/Makefile.sources @@ -7,6 +7,8 @@ BLORP_FILES = \ blorp/blorp_priv.h COMMON_FILES = \ + common/gen_debug.c \ + common/gen_debug.h \ common/gen_device_info.c \ common/gen_device_info.h \ common/gen_l3_config.c \ diff --git a/src/intel/common/gen_debug.c b/src/intel/common/gen_debug.c new file mode 100644 index 00000000000..858f04db432 --- /dev/null +++ b/src/intel/common/gen_debug.c @@ -0,0 +1,109 @@ +/* + * Copyright 2003 VMware, Inc. + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +/** + * \file gen_debug.c + * + * Support for the INTEL_DEBUG environment variable, along with other + * miscellaneous debugging code. + */ + +#include + +#include "common/gen_debug.h" +#include "util/macros.h" +#include "util/u_atomic.h" /* for p_atomic_cmpxchg */ +#include "util/debug.h" + +uint64_t INTEL_DEBUG = 0; + +static const struct debug_control debug_control[] = { + { "tex", DEBUG_TEXTURE}, + { "state", DEBUG_STATE}, + { "blit", DEBUG_BLIT}, + { "mip", DEBUG_MIPTREE}, + { "fall", DEBUG_PERF}, + { "perf", DEBUG_PERF}, + { "perfmon", DEBUG_PERFMON}, + { "bat", DEBUG_BATCH}, + { "pix", DEBUG_PIXEL}, + { "buf", DEBUG_BUFMGR}, + { "fbo", DEBUG_FBO}, + { "fs", DEBUG_WM }, + { "gs", DEBUG_GS}, + { "sync", DEBUG_SYNC}, + { "prim", DEBUG_PRIMS }, + { "vert", DEBUG_VERTS }, + { "dri", DEBUG_DRI }, + { "sf", DEBUG_SF }, + { "stats", DEBUG_STATS }, + { "wm", DEBUG_WM }, + { "urb", DEBUG_URB }, + { "vs", DEBUG_VS }, + { "clip", DEBUG_CLIP }, + { "aub", DEBUG_AUB }, + { "shader_time", DEBUG_SHADER_TIME }, + { "no16", DEBUG_NO16 }, + { "blorp", DEBUG_BLORP }, + { "nodualobj", DEBUG_NO_DUAL_OBJECT_GS }, + { "optimizer", DEBUG_OPTIMIZER }, + { "ann", DEBUG_ANNOTATION }, + { "no8", DEBUG_NO8 }, + { "vec4", DEBUG_VEC4VS }, + { "spill_fs", DEBUG_SPILL_FS }, + { "spill_vec4", DEBUG_SPILL_VEC4 }, + { "cs", DEBUG_CS }, + { "hex", DEBUG_HEX }, + { "nocompact", DEBUG_NO_COMPACTION }, + { "hs", DEBUG_TCS }, + { "tcs", DEBUG_TCS }, + { "ds", DEBUG_TES }, + { "tes", DEBUG_TES }, + { "l3", DEBUG_L3 }, + { "do32", DEBUG_DO32 }, + { "norbc", DEBUG_NO_RBC }, + { NULL, 0 } +}; + +uint64_t +intel_debug_flag_for_shader_stage(gl_shader_stage stage) +{ + uint64_t flags[] = { + [MESA_SHADER_VERTEX] = DEBUG_VS, + [MESA_SHADER_TESS_CTRL] = DEBUG_TCS, + [MESA_SHADER_TESS_EVAL] = DEBUG_TES, + [MESA_SHADER_GEOMETRY] = DEBUG_GS, + [MESA_SHADER_FRAGMENT] = DEBUG_WM, + [MESA_SHADER_COMPUTE] = DEBUG_CS, + }; + STATIC_ASSERT(MESA_SHADER_STAGES == 6); + return flags[stage]; +} + +void +brw_process_intel_debug_variable(void) +{ + uint64_t intel_debug = parse_debug_string(getenv("INTEL_DEBUG"), debug_control); + (void) p_atomic_cmpxchg(&INTEL_DEBUG, 0, intel_debug); +} diff --git a/src/intel/common/gen_debug.h b/src/intel/common/gen_debug.h new file mode 100644 index 00000000000..24ed7d4bc1b --- /dev/null +++ b/src/intel/common/gen_debug.h @@ -0,0 +1,134 @@ +/* + * Copyright 2003 VMware, Inc. + * Copyright © 2007 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +#pragma once + +#include +#include "compiler/shader_enums.h" + +#ifdef __cplusplus +extern "C" { +#endif +/** + * \file gen_debug.h + * + * Basic INTEL_DEBUG environment variable handling. This file defines the + * list of debugging flags, as well as some macros for handling them. + */ + +extern uint64_t INTEL_DEBUG; + +#define DEBUG_TEXTURE (1ull << 0) +#define DEBUG_STATE (1ull << 1) +#define DEBUG_BLIT (1ull << 2) +#define DEBUG_MIPTREE (1ull << 3) +#define DEBUG_PERF (1ull << 4) +#define DEBUG_PERFMON (1ull << 5) +#define DEBUG_BATCH (1ull << 6) +#define DEBUG_PIXEL (1ull << 7) +#define DEBUG_BUFMGR (1ull << 8) +#define DEBUG_FBO (1ull << 9) +#define DEBUG_GS (1ull << 10) +#define DEBUG_SYNC (1ull << 11) +#define DEBUG_PRIMS (1ull << 12) +#define DEBUG_VERTS (1ull << 13) +#define DEBUG_DRI (1ull << 14) +#define DEBUG_SF (1ull << 15) +#define DEBUG_STATS (1ull << 16) +#define DEBUG_WM (1ull << 17) +#define DEBUG_URB (1ull << 18) +#define DEBUG_VS (1ull << 19) +#define DEBUG_CLIP (1ull << 20) +#define DEBUG_AUB (1ull << 21) +#define DEBUG_SHADER_TIME (1ull << 22) +#define DEBUG_BLORP (1ull << 23) +#define DEBUG_NO16 (1ull << 24) +#define DEBUG_NO_DUAL_OBJECT_GS (1ull << 25) +#define DEBUG_OPTIMIZER (1ull << 26) +#define DEBUG_ANNOTATION (1ull << 27) +#define DEBUG_NO8 (1ull << 28) +#define DEBUG_VEC4VS (1ull << 29) +#define DEBUG_SPILL_FS (1ull << 30) +#define DEBUG_SPILL_VEC4 (1ull << 31) +#define DEBUG_CS (1ull << 32) +#define DEBUG_HEX (1ull << 33) +#define DEBUG_NO_COMPACTION (1ull << 34) +#define DEBUG_TCS (1ull << 35) +#define DEBUG_TES (1ull << 36) +#define DEBUG_L3 (1ull << 37) +#define DEBUG_DO32 (1ull << 38) +#define DEBUG_NO_RBC (1ull << 39) + +#ifdef HAVE_ANDROID_PLATFORM +#define LOG_TAG "INTEL-MESA" +#include +#ifndef ALOGW +#define ALOGW LOGW +#endif +#define dbg_printf(...) ALOGW(__VA_ARGS__) +#else +#define dbg_printf(...) fprintf(stderr, __VA_ARGS__) +#endif /* HAVE_ANDROID_PLATFORM */ + +#define DBG(...) do { \ + if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \ + dbg_printf(__VA_ARGS__); \ +} while(0) + +#define perf_debug(...) do { \ + static GLuint msg_id = 0; \ + if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \ + dbg_printf(__VA_ARGS__); \ + if (brw->perf_debug) \ + _mesa_gl_debug(&brw->ctx, &msg_id, \ + MESA_DEBUG_SOURCE_API, \ + MESA_DEBUG_TYPE_PERFORMANCE, \ + MESA_DEBUG_SEVERITY_MEDIUM, \ + __VA_ARGS__); \ +} while(0) + +#define WARN_ONCE(cond, fmt...) do { \ + if (unlikely(cond)) { \ + static bool _warned = false; \ + static GLuint msg_id = 0; \ + if (!_warned) { \ + fprintf(stderr, "WARNING: "); \ + fprintf(stderr, fmt); \ + _warned = true; \ + \ + _mesa_gl_debug(ctx, &msg_id, \ + MESA_DEBUG_SOURCE_API, \ + MESA_DEBUG_TYPE_OTHER, \ + MESA_DEBUG_SEVERITY_HIGH, fmt); \ + } \ + } \ +} while (0) + +extern uint64_t intel_debug_flag_for_shader_stage(gl_shader_stage stage); + +extern void brw_process_intel_debug_variable(void); + +#ifdef __cplusplus +} +#endif diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am index f87fa67ef8e..4ff7e70b51f 100644 --- a/src/mesa/drivers/dri/i965/Makefile.am +++ b/src/mesa/drivers/dri/i965/Makefile.am @@ -98,6 +98,7 @@ EXTRA_DIST = \ TEST_LIBS = \ libi965_compiler.la \ $(I965_PERGEN_LIBS) \ + $(top_builddir)/src/intel/common/libintel_common.la \ $(top_builddir)/src/compiler/nir/libnir.la \ $(top_builddir)/src/util/libmesautil.la \ $(top_builddir)/src/intel/isl/libisl.la \ diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index 4711be07b49..62cbdfee6a5 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -84,9 +84,7 @@ i965_compiler_FILES = \ gen6_gs_visitor.cpp \ gen6_gs_visitor.h \ intel_asm_annotation.c \ - intel_asm_annotation.h \ - intel_debug.c \ - intel_debug.h + intel_asm_annotation.h i965_compiler_GENERATED_FILES = \ brw_nir_trig_workarounds.c diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 52f85ff0677..9f7ba3dd5a1 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -34,7 +34,7 @@ #include "brw_meta_util.h" #include "brw_state.h" #include "intel_fbo.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #define FILE_DEBUG_FLAG DEBUG_BLORP diff --git a/src/mesa/drivers/dri/i965/brw_compiler.c b/src/mesa/drivers/dri/i965/brw_compiler.c index f414099c7da..fcad570edff 100644 --- a/src/mesa/drivers/dri/i965/brw_compiler.c +++ b/src/mesa/drivers/dri/i965/brw_compiler.c @@ -23,7 +23,7 @@ #include "brw_compiler.h" #include "brw_shader.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #include "compiler/nir/nir.h" #include "main/errors.h" #include "util/debug.h" diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 288ef3a2066..490790824e6 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -45,7 +45,7 @@ #include -#include "intel_debug.h" +#include "common/gen_debug.h" #include "intel_screen.h" #include "intel_tex_obj.h" #include "intel_resolve_map.h" diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c index e4cbf53e41b..1344f2b18e1 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.c +++ b/src/mesa/drivers/dri/i965/brw_eu.c @@ -33,7 +33,7 @@ #include "brw_defines.h" #include "brw_eu.h" #include "brw_shader.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #include "util/ralloc.h" diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c index 778fb6aef98..5b8e9b2b416 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_compact.c +++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c @@ -75,7 +75,7 @@ #include "brw_eu.h" #include "brw_shader.h" #include "intel_asm_annotation.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #include "util/u_atomic.h" /* for p_atomic_cmpxchg */ static const uint32_t g45_control_index_table[32] = { diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index f5773864bd1..ead5b261323 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -37,7 +37,7 @@ #include "brw_cfg.h" #include "brw_program.h" #include "brw_dead_control_flow.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #include "compiler/glsl_types.h" #include "compiler/nir/nir_builder.h" #include "program/prog_parameter.h" diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c index 15e290a1e27..3cf2c980b68 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.c +++ b/src/mesa/drivers/dri/i965/brw_nir.c @@ -23,7 +23,7 @@ #include "brw_nir.h" #include "brw_shader.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #include "compiler/glsl_types.h" #include "compiler/nir/nir_builder.h" diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 7522a938ad6..bfaa5e7bfe2 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -26,7 +26,7 @@ #include "brw_fs.h" #include "brw_nir.h" #include "brw_vec4_tes.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #include "main/uniforms.h" #include "util/macros.h" diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 95199fbc799..d7c09093032 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -29,7 +29,7 @@ #include "brw_vec4_live_variables.h" #include "brw_vec4_vs.h" #include "brw_dead_control_flow.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #include "program/prog_parameter.h" #define MAX_INSTRUCTION (1 << 30) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp index 83f5711c1b8..abf522a782d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp @@ -24,7 +24,7 @@ #include "brw_cfg.h" #include "brw_eu.h" #include "brw_program.h" -#include "intel_debug.h" +#include "common/gen_debug.h" using namespace brw; diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp index 3a8bc77531b..4a8b5be30e1 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp @@ -31,7 +31,7 @@ #include "gen6_gs_visitor.h" #include "brw_fs.h" #include "brw_nir.h" -#include "intel_debug.h" +#include "common/gen_debug.h" namespace brw { diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp index d27074c1312..d4a647d029f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp @@ -30,7 +30,7 @@ #include "brw_nir.h" #include "brw_vec4_tcs.h" #include "brw_fs.h" -#include "intel_debug.h" +#include "common/gen_debug.h" namespace brw { diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp index 0c05ab0c157..bcf9a87eb01 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp @@ -29,7 +29,7 @@ #include "brw_vec4_tes.h" #include "brw_cfg.h" -#include "intel_debug.h" +#include "common/gen_debug.h" namespace brw { diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp index a80a61bb4fa..0cec77990d6 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp @@ -23,7 +23,7 @@ #include "brw_vec4_vs.h" -#include "intel_debug.h" +#include "common/gen_debug.h" namespace brw { diff --git a/src/mesa/drivers/dri/i965/brw_vue_map.c b/src/mesa/drivers/dri/i965/brw_vue_map.c index 89120684cba..e14cba8f67d 100644 --- a/src/mesa/drivers/dri/i965/brw_vue_map.c +++ b/src/mesa/drivers/dri/i965/brw_vue_map.c @@ -41,7 +41,7 @@ #include "brw_compiler.h" -#include "intel_debug.h" +#include "common/gen_debug.h" static inline void assign_vue_slot(struct brw_vue_map *vue_map, int varying, int slot) diff --git a/src/mesa/drivers/dri/i965/intel_asm_annotation.c b/src/mesa/drivers/dri/i965/intel_asm_annotation.c index bb24e5e8ad2..1f3b78476e3 100644 --- a/src/mesa/drivers/dri/i965/intel_asm_annotation.c +++ b/src/mesa/drivers/dri/i965/intel_asm_annotation.c @@ -23,7 +23,7 @@ #include "brw_cfg.h" #include "brw_eu.h" -#include "intel_debug.h" +#include "common/gen_debug.h" #include "intel_asm_annotation.h" #include "compiler/nir/nir.h" diff --git a/src/mesa/drivers/dri/i965/intel_debug.c b/src/mesa/drivers/dri/i965/intel_debug.c deleted file mode 100644 index 33e840293a2..00000000000 --- a/src/mesa/drivers/dri/i965/intel_debug.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright 2003 VMware, Inc. - * Copyright © 2006 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -/** - * \file intel_debug.c - * - * Support for the INTEL_DEBUG environment variable, along with other - * miscellaneous debugging code. - */ - -#include "brw_context.h" -#include "intel_debug.h" -#include "util/u_atomic.h" /* for p_atomic_cmpxchg */ -#include "util/debug.h" - -uint64_t INTEL_DEBUG = 0; - -static const struct debug_control debug_control[] = { - { "tex", DEBUG_TEXTURE}, - { "state", DEBUG_STATE}, - { "blit", DEBUG_BLIT}, - { "mip", DEBUG_MIPTREE}, - { "fall", DEBUG_PERF}, - { "perf", DEBUG_PERF}, - { "perfmon", DEBUG_PERFMON}, - { "bat", DEBUG_BATCH}, - { "pix", DEBUG_PIXEL}, - { "buf", DEBUG_BUFMGR}, - { "fbo", DEBUG_FBO}, - { "fs", DEBUG_WM }, - { "gs", DEBUG_GS}, - { "sync", DEBUG_SYNC}, - { "prim", DEBUG_PRIMS }, - { "vert", DEBUG_VERTS }, - { "dri", DEBUG_DRI }, - { "sf", DEBUG_SF }, - { "stats", DEBUG_STATS }, - { "wm", DEBUG_WM }, - { "urb", DEBUG_URB }, - { "vs", DEBUG_VS }, - { "clip", DEBUG_CLIP }, - { "aub", DEBUG_AUB }, - { "shader_time", DEBUG_SHADER_TIME }, - { "no16", DEBUG_NO16 }, - { "blorp", DEBUG_BLORP }, - { "nodualobj", DEBUG_NO_DUAL_OBJECT_GS }, - { "optimizer", DEBUG_OPTIMIZER }, - { "ann", DEBUG_ANNOTATION }, - { "no8", DEBUG_NO8 }, - { "vec4", DEBUG_VEC4VS }, - { "spill_fs", DEBUG_SPILL_FS }, - { "spill_vec4", DEBUG_SPILL_VEC4 }, - { "cs", DEBUG_CS }, - { "hex", DEBUG_HEX }, - { "nocompact", DEBUG_NO_COMPACTION }, - { "hs", DEBUG_TCS }, - { "tcs", DEBUG_TCS }, - { "ds", DEBUG_TES }, - { "tes", DEBUG_TES }, - { "l3", DEBUG_L3 }, - { "do32", DEBUG_DO32 }, - { "norbc", DEBUG_NO_RBC }, - { NULL, 0 } -}; - -uint64_t -intel_debug_flag_for_shader_stage(gl_shader_stage stage) -{ - uint64_t flags[] = { - [MESA_SHADER_VERTEX] = DEBUG_VS, - [MESA_SHADER_TESS_CTRL] = DEBUG_TCS, - [MESA_SHADER_TESS_EVAL] = DEBUG_TES, - [MESA_SHADER_GEOMETRY] = DEBUG_GS, - [MESA_SHADER_FRAGMENT] = DEBUG_WM, - [MESA_SHADER_COMPUTE] = DEBUG_CS, - }; - STATIC_ASSERT(MESA_SHADER_STAGES == 6); - return flags[stage]; -} - -void -brw_process_intel_debug_variable(void) -{ - uint64_t intel_debug = parse_debug_string(getenv("INTEL_DEBUG"), debug_control); - (void) p_atomic_cmpxchg(&INTEL_DEBUG, 0, intel_debug); -} diff --git a/src/mesa/drivers/dri/i965/intel_debug.h b/src/mesa/drivers/dri/i965/intel_debug.h deleted file mode 100644 index 8c81c1d3069..00000000000 --- a/src/mesa/drivers/dri/i965/intel_debug.h +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Copyright 2003 VMware, Inc. - * Copyright © 2007 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ -#pragma once - -#include -#include "compiler/shader_enums.h" - -#ifdef __cplusplus -extern "C" { -#endif -/** - * \file intel_debug.h - * - * Basic INTEL_DEBUG environment variable handling. This file defines the - * list of debugging flags, as well as some macros for handling them. - */ - -extern uint64_t INTEL_DEBUG; - -#define DEBUG_TEXTURE (1ull << 0) -#define DEBUG_STATE (1ull << 1) -#define DEBUG_BLIT (1ull << 2) -#define DEBUG_MIPTREE (1ull << 3) -#define DEBUG_PERF (1ull << 4) -#define DEBUG_PERFMON (1ull << 5) -#define DEBUG_BATCH (1ull << 6) -#define DEBUG_PIXEL (1ull << 7) -#define DEBUG_BUFMGR (1ull << 8) -#define DEBUG_FBO (1ull << 9) -#define DEBUG_GS (1ull << 10) -#define DEBUG_SYNC (1ull << 11) -#define DEBUG_PRIMS (1ull << 12) -#define DEBUG_VERTS (1ull << 13) -#define DEBUG_DRI (1ull << 14) -#define DEBUG_SF (1ull << 15) -#define DEBUG_STATS (1ull << 16) -#define DEBUG_WM (1ull << 17) -#define DEBUG_URB (1ull << 18) -#define DEBUG_VS (1ull << 19) -#define DEBUG_CLIP (1ull << 20) -#define DEBUG_AUB (1ull << 21) -#define DEBUG_SHADER_TIME (1ull << 22) -#define DEBUG_BLORP (1ull << 23) -#define DEBUG_NO16 (1ull << 24) -#define DEBUG_NO_DUAL_OBJECT_GS (1ull << 25) -#define DEBUG_OPTIMIZER (1ull << 26) -#define DEBUG_ANNOTATION (1ull << 27) -#define DEBUG_NO8 (1ull << 28) -#define DEBUG_VEC4VS (1ull << 29) -#define DEBUG_SPILL_FS (1ull << 30) -#define DEBUG_SPILL_VEC4 (1ull << 31) -#define DEBUG_CS (1ull << 32) -#define DEBUG_HEX (1ull << 33) -#define DEBUG_NO_COMPACTION (1ull << 34) -#define DEBUG_TCS (1ull << 35) -#define DEBUG_TES (1ull << 36) -#define DEBUG_L3 (1ull << 37) -#define DEBUG_DO32 (1ull << 38) -#define DEBUG_NO_RBC (1ull << 39) - -#ifdef HAVE_ANDROID_PLATFORM -#define LOG_TAG "INTEL-MESA" -#include -#ifndef ALOGW -#define ALOGW LOGW -#endif -#define dbg_printf(...) ALOGW(__VA_ARGS__) -#else -#define dbg_printf(...) fprintf(stderr, __VA_ARGS__) -#endif /* HAVE_ANDROID_PLATFORM */ - -#define DBG(...) do { \ - if (unlikely(INTEL_DEBUG & FILE_DEBUG_FLAG)) \ - dbg_printf(__VA_ARGS__); \ -} while(0) - -#define perf_debug(...) do { \ - static GLuint msg_id = 0; \ - if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \ - dbg_printf(__VA_ARGS__); \ - if (brw->perf_debug) \ - _mesa_gl_debug(&brw->ctx, &msg_id, \ - MESA_DEBUG_SOURCE_API, \ - MESA_DEBUG_TYPE_PERFORMANCE, \ - MESA_DEBUG_SEVERITY_MEDIUM, \ - __VA_ARGS__); \ -} while(0) - -#define WARN_ONCE(cond, fmt...) do { \ - if (unlikely(cond)) { \ - static bool _warned = false; \ - static GLuint msg_id = 0; \ - if (!_warned) { \ - fprintf(stderr, "WARNING: "); \ - fprintf(stderr, fmt); \ - _warned = true; \ - \ - _mesa_gl_debug(ctx, &msg_id, \ - MESA_DEBUG_SOURCE_API, \ - MESA_DEBUG_TYPE_OTHER, \ - MESA_DEBUG_SEVERITY_HIGH, fmt); \ - } \ - } \ -} while (0) - -extern uint64_t intel_debug_flag_for_shader_stage(gl_shader_stage stage); - -extern void brw_process_intel_debug_variable(void); - -#ifdef __cplusplus -} -#endif