From: Uros Bizjak Date: Wed, 24 Aug 2016 14:59:43 +0000 (+0200) Subject: re PR target/77270 (Flag -mprftchw is shared with 3dnow for -march=k8) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d5b5d21260d1036b078cad42ec2fe88754cd8ca3;p=gcc.git re PR target/77270 (Flag -mprftchw is shared with 3dnow for -march=k8) PR target/77270 * gcc.dg/tree-ssa/loop-28.c: Also compile on 32bit x86 targets. (dg-options): Use -march=amdfam10 instead of -march=athlon. * gcc.dg/tree-ssa/update-unroll-1.c: Ditto. * gcc.dg/tree-ssa/prefetch-3.c: Ditto. * gcc.dg/tree-ssa/prefetch-4.c: Ditto. * gcc.dg/tree-ssa/prefetch-5.c: Ditto. * gcc.dg/tree-ssa/prefetch-6.c: Ditto. Do not require sse2 effective target. Remove scan-assembler-times directives. * gcc.dg/tree-ssa/prefetch-7.c: Ditto. * gcc.dg/tree-ssa/prefetch-8.c: Ditto. * gcc.dg/tree-ssa/prefetch-9.c: Ditto. From-SVN: r239737 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 76381eff67e..354e485de44 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,18 @@ +2016-08-24 Uros Bizjak + + PR target/77270 + * gcc.dg/tree-ssa/loop-28.c: Also compile on 32bit x86 targets. + (dg-options): Use -march=amdfam10 instead of -march=athlon. + * gcc.dg/tree-ssa/update-unroll-1.c: Ditto. + * gcc.dg/tree-ssa/prefetch-3.c: Ditto. + * gcc.dg/tree-ssa/prefetch-4.c: Ditto. + * gcc.dg/tree-ssa/prefetch-5.c: Ditto. + * gcc.dg/tree-ssa/prefetch-6.c: Ditto. Do not require sse2 + effective target. Remove scan-assembler-times directives. + * gcc.dg/tree-ssa/prefetch-7.c: Ditto. + * gcc.dg/tree-ssa/prefetch-8.c: Ditto. + * gcc.dg/tree-ssa/prefetch-9.c: Ditto. + 2016-08-24 Senthil Kumar Selvaraj * gcc.c-torture/execute/pr71083.c: Use UINT32_TYPE instead diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c index 3668bc23ed8..3ca0ab8ea5f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c @@ -1,5 +1,5 @@ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -fdump-tree-optimized -fdump-tree-aprefetch --param max-unrolled-insns=1000" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 -fdump-tree-optimized -fdump-tree-aprefetch --param max-unrolled-insns=1000" } */ char x[100000]; diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c index 746d74bd589..467903bf3fc 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c @@ -1,7 +1,7 @@ /* Prefetching used to prefer nonsensical unroll factor of 5 in this testcase. */ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse -fdump-tree-aprefetch-details" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 -fdump-tree-aprefetch-details" } */ #define N 1000000 diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c index 5ac62e9b184..dc8e40aca27 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c @@ -1,7 +1,7 @@ /* The loop rolls too little, hence the prefetching would not be useful. */ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -fdump-tree-optimized" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 -fdump-tree-optimized" } */ int xxx[20]; diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c index af1bb13c254..7f343b66025 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c @@ -1,5 +1,5 @@ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-options "-O2 --param min-insn-to-prefetch-ratio=5 -fprefetch-loop-arrays -march=athlon -fdump-tree-aprefetch-details" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param min-insn-to-prefetch-ratio=5 -fdump-tree-aprefetch-details" } */ /* These are common idioms for writing variable-length arrays at the end of structures. We should not deduce anything about the number of iterations diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c index 4425c7e5c6a..12f09016943 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c @@ -1,6 +1,5 @@ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-require-effective-target sse2 } */ -/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6 -fdump-tree-aprefetch-details" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param simultaneous-prefetches=100 --param min-insn-to-prefetch-ratio=6 -fdump-tree-aprefetch-details" } */ #define N 1000 #define K 900 @@ -47,7 +46,3 @@ double test(void) /* { dg-final { scan-tree-dump-times "Issued prefetch" 5 "aprefetch" } } */ /* { dg-final { scan-tree-dump-times "Issued nontemporal prefetch" 3 "aprefetch" } } */ - -/* { dg-final { scan-assembler-times "prefetcht" 5 } } */ -/* { dg-final { scan-assembler-times "prefetchnta" 3 } } */ - diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c index 713dee6e121..c9f70271892 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-require-effective-target sse2 } */ -/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */ -/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */ #define K 1000000 int a[K]; @@ -39,8 +37,3 @@ void test(int *p) /* { dg-final { scan-tree-dump-times "a nontemporal store" 0 "aprefetch" } } */ /* { dg-final { scan-tree-dump-times "builtin_prefetch" 7 "optimized" } } */ - -/* { dg-final { scan-assembler-times "prefetchw" 5 } } */ -/* { dg-final { scan-assembler-times "prefetcht" 1 } } */ -/* { dg-final { scan-assembler-times "prefetchnta" 1 } } */ - diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c index c25bbe83c13..fe433ac3a7f 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-require-effective-target sse2 } */ -/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */ -/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */ #define K 1000000 int a[K]; @@ -19,7 +17,3 @@ void test() /* { dg-final { scan-tree-dump "=\\{nt\\}" "optimized" } } */ /* { dg-final { scan-tree-dump-times "__builtin_ia32_mfence" 1 "optimized" } } */ - -/* { dg-final { scan-assembler "movnti" } } */ -/* { dg-final { scan-assembler-times "mfence" 1 } } */ - diff --git a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c index a4f3fa46c0a..5be9282c9be 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c @@ -1,7 +1,5 @@ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-require-effective-target sse2 } */ -/* { dg-skip-if "" { i?86-*-* x86_64-*-* } { "-march=*" } { "-march=athlon" } } */ -/* { dg-options "-O2 -fprefetch-loop-arrays -march=athlon -msse2 -mfpmath=sse --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O2 -fprefetch-loop-arrays -march=amdfam10 --param simultaneous-prefetches=100 -fdump-tree-aprefetch-details -fdump-tree-optimized" } */ #define K 1000000 int a[K], b[K]; @@ -22,8 +20,3 @@ void test() /* { dg-final { scan-tree-dump-times "builtin_prefetch" 1 "optimized" } } */ /* { dg-final { scan-tree-dump "=\\{nt\\}" "optimized" } } */ /* { dg-final { scan-tree-dump-times "__builtin_ia32_mfence" 1 "optimized" } } */ - -/* { dg-final { scan-assembler-times "prefetchnta" 1 } } */ -/* { dg-final { scan-assembler "movnti" } } */ -/* { dg-final { scan-assembler-times "mfence" 1 } } */ - diff --git a/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c b/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c index 5aa288ab8cc..1028c8b06f5 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c @@ -1,5 +1,5 @@ -/* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-options "-O1 -fprefetch-loop-arrays -march=athlon -fdump-tree-aprefetch-blocks" } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-options "-O1 -fprefetch-loop-arrays -march=amdfam10 -fdump-tree-aprefetch-blocks" } */ int a[10000];