From: Sagar Ghuge Date: Tue, 4 Jun 2019 20:05:20 +0000 (-0700) Subject: intel/tools: Add assembler unit tests for ROL/ROR instructions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d5f63990b4bdf0458b48da34dddb7656b8393ec7;p=mesa.git intel/tools: Add assembler unit tests for ROL/ROR instructions Signed-off-by: Sagar Ghuge Reviewed-by: Matt Turner --- diff --git a/src/intel/tools/meson.build b/src/intel/tools/meson.build index 4aa09d99cee..b0598f39ab5 100644 --- a/src/intel/tools/meson.build +++ b/src/intel/tools/meson.build @@ -164,6 +164,7 @@ asm_testcases = [ ['hsw', 'tests/gen7.5'], ['bdw', 'tests/gen8'], ['skl', 'tests/gen9'], + ['icl', 'tests/gen11'], ] test_runner = find_program('tests/run-test.sh') diff --git a/src/intel/tools/tests/gen11/rol.asm b/src/intel/tools/tests/gen11/rol.asm new file mode 100644 index 00000000000..e8eba29ff9d --- /dev/null +++ b/src/intel/tools/tests/gen11/rol.asm @@ -0,0 +1 @@ +rol(16) g3<1>UD g2<0,1,0>UD g2.1<0,1,0>UD { align1 1H }; diff --git a/src/intel/tools/tests/gen11/rol.expected b/src/intel/tools/tests/gen11/rol.expected new file mode 100644 index 00000000000..e9daccab7e4 --- /dev/null +++ b/src/intel/tools/tests/gen11/rol.expected @@ -0,0 +1 @@ +0f 00 80 00 08 02 60 20 40 00 00 02 44 00 00 00 diff --git a/src/intel/tools/tests/gen11/ror.asm b/src/intel/tools/tests/gen11/ror.asm new file mode 100644 index 00000000000..4a83a26ada4 --- /dev/null +++ b/src/intel/tools/tests/gen11/ror.asm @@ -0,0 +1 @@ +ror(16) g3<1>UD g2<0,1,0>UD g2.1<0,1,0>UD { align1 1H }; diff --git a/src/intel/tools/tests/gen11/ror.expected b/src/intel/tools/tests/gen11/ror.expected new file mode 100644 index 00000000000..1778601e0bc --- /dev/null +++ b/src/intel/tools/tests/gen11/ror.expected @@ -0,0 +1 @@ +0e 00 80 00 08 02 60 20 40 00 00 02 44 00 00 00