From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Thu, 25 Apr 2013 16:36:45 +0000 (+0200)
Subject: minimac3: move psync
X-Git-Tag: 24jan2021_ls180~2970
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d64b64501a53ef6673c4c6a97d9ab17ea6d8b66d;p=litex.git

minimac3: move psync
---

diff --git a/verilog/generic/psync.v b/verilog/generic/psync.v
deleted file mode 100644
index 26597bb7..00000000
--- a/verilog/generic/psync.v
+++ /dev/null
@@ -1,31 +0,0 @@
-module psync(
-	input clk1,
-	input i,
-	input clk2,
-	output o
-);
-
-reg level;
-always @(posedge clk1)
-	if(i)
-		level <= ~level;
-
-reg level1;
-reg level2;
-reg level3;
-always @(posedge clk2) begin
-	level1 <= level;
-	level2 <= level1;
-	level3 <= level2;
-end
-
-assign o = level2 ^ level3;
-
-initial begin
-	level <= 1'b0;
-	level1 <= 1'b0;
-	level2 <= 1'b0;
-	level3 <= 1'b0;
-end
-
-endmodule
diff --git a/verilog/minimac3/psync.v b/verilog/minimac3/psync.v
new file mode 100644
index 00000000..26597bb7
--- /dev/null
+++ b/verilog/minimac3/psync.v
@@ -0,0 +1,31 @@
+module psync(
+	input clk1,
+	input i,
+	input clk2,
+	output o
+);
+
+reg level;
+always @(posedge clk1)
+	if(i)
+		level <= ~level;
+
+reg level1;
+reg level2;
+reg level3;
+always @(posedge clk2) begin
+	level1 <= level;
+	level2 <= level1;
+	level3 <= level2;
+end
+
+assign o = level2 ^ level3;
+
+initial begin
+	level <= 1'b0;
+	level1 <= 1'b0;
+	level2 <= 1'b0;
+	level3 <= 1'b0;
+end
+
+endmodule