From: Jacob Lifshay Date: Fri, 19 Aug 2022 02:40:16 +0000 (-0700) Subject: autoformat all code X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d654fa20083c6f454cae683efb6987862e2c6b4d;p=nmutil.git autoformat all code --- diff --git a/src/nmutil/lut.py b/src/nmutil/lut.py index 84c515e..755747a 100644 --- a/src/nmutil/lut.py +++ b/src/nmutil/lut.py @@ -18,6 +18,7 @@ from nmigen.hdl.ir import Elaboratable from nmigen.cli import rtlil from nmutil.plain_data import plain_data + class BitwiseMux(Elaboratable): """Mux, but treating input/output Signals as bit vectors, rather than integers. This means each bit in the output is independently multiplexed diff --git a/src/nmutil/popcount.py b/src/nmutil/popcount.py index cdbe3b2..b3e3bea 100644 --- a/src/nmutil/popcount.py +++ b/src/nmutil/popcount.py @@ -59,4 +59,3 @@ if __name__ == "__main__": vl = rtlil.convert(m) with open("test_popcount.il", "w") as f: f.write(vl) - diff --git a/src/nmutil/stageapi.py b/src/nmutil/stageapi.py index a34dc7e..17c4f65 100644 --- a/src/nmutil/stageapi.py +++ b/src/nmutil/stageapi.py @@ -197,7 +197,7 @@ class StageHelper(Stage): def setup(self, m, i): if self.stage is not None and hasattr(self.stage, "setup"): - if self.stage is not self: # stop infinite recursion + if self.stage is not self: # stop infinite recursion self.stage.setup(m, i) def _postprocess(self, i): # XXX DISABLED diff --git a/src/nmutil/test/test_prefix_sum.py b/src/nmutil/test/test_prefix_sum.py index 48598b8..2b88407 100644 --- a/src/nmutil/test/test_prefix_sum.py +++ b/src/nmutil/test/test_prefix_sum.py @@ -70,7 +70,7 @@ class TestPrefixSum(FHDLTestCase): def tst_pop_count_int(self, width): assert isinstance(width, int) for v in range(1 << width): - expected = bin(v).count("1") # converts to a string, counts 1s + expected = bin(v).count("1") # converts to a string, counts 1s with self.subTest(v=v, expected=expected): self.assertEqual(expected, pop_count(v, width=width))