From: Will Schmidt Date: Fri, 2 Jun 2017 15:02:25 +0000 (+0000) Subject: rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vec_min... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d65d1bd970c3008e70a6418d2fdaace3f4f2e581;p=gcc.git rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vec_min and vec_max builtins. [gcc] 2017-06-02 Will Schmidt * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vec_min and vec_max builtins. (builtin_function_type): Add min/max unsigned variants to those identified as having unsigned arguments. [gcc/testsuite] 2017-06-02 Will Schmidt * testsuite/gcc.target/powerpc/fold-vec-minmax-char.c: New. * testsuite/gcc.target/powerpc/fold-vec-minmax-floatdouble.c: New. * testsuite/gcc.target/powerpc/fold-vec-minmax-int.c: New. * testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c: New. * testsuite/gcc.target/powerpc/fold-vec-minmax-short.c: New. From-SVN: r248834 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ca6327059e7..345c3ecdc89 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-06-02 Will Schmidt + * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling + for early expansion of vec_min and vec_max builtins. + (builtin_function_type): Add min/max unsigned variants to those + identified as having unsigned arguments. + 2017-06-02 Olivier Hainque * config/vx-common.h (DWARF_UNWIND_INFO): Switch #define to 1. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 96bd6e069c3..e3de2edbb58 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -17347,6 +17347,46 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) gsi_replace (gsi, g, true); return true; } + /* flavors of vec_min. */ + case VSX_BUILTIN_XVMINDP: + case P8V_BUILTIN_VMINSD: + case P8V_BUILTIN_VMINUD: + case ALTIVEC_BUILTIN_VMINSB: + case ALTIVEC_BUILTIN_VMINSH: + case ALTIVEC_BUILTIN_VMINSW: + case ALTIVEC_BUILTIN_VMINUB: + case ALTIVEC_BUILTIN_VMINUH: + case ALTIVEC_BUILTIN_VMINUW: + case ALTIVEC_BUILTIN_VMINFP: + { + arg0 = gimple_call_arg (stmt, 0); + arg1 = gimple_call_arg (stmt, 1); + lhs = gimple_call_lhs (stmt); + gimple *g = gimple_build_assign (lhs, MIN_EXPR, arg0, arg1); + gimple_set_location (g, gimple_location (stmt)); + gsi_replace (gsi, g, true); + return true; + } + /* flavors of vec_max. */ + case VSX_BUILTIN_XVMAXDP: + case P8V_BUILTIN_VMAXSD: + case P8V_BUILTIN_VMAXUD: + case ALTIVEC_BUILTIN_VMAXSB: + case ALTIVEC_BUILTIN_VMAXSH: + case ALTIVEC_BUILTIN_VMAXSW: + case ALTIVEC_BUILTIN_VMAXUB: + case ALTIVEC_BUILTIN_VMAXUH: + case ALTIVEC_BUILTIN_VMAXUW: + case ALTIVEC_BUILTIN_VMAXFP: + { + arg0 = gimple_call_arg (stmt, 0); + arg1 = gimple_call_arg (stmt, 1); + lhs = gimple_call_lhs (stmt); + gimple *g = gimple_build_assign (lhs, MAX_EXPR, arg0, arg1); + gimple_set_location (g, gimple_location (stmt)); + gsi_replace (gsi, g, true); + return true; + } default: break; } @@ -18985,6 +19025,14 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, case MISC_BUILTIN_DIVDEU: case MISC_BUILTIN_DIVDEUO: case VSX_BUILTIN_UDIV_V2DI: + case ALTIVEC_BUILTIN_VMAXUB: + case ALTIVEC_BUILTIN_VMINUB: + case ALTIVEC_BUILTIN_VMAXUH: + case ALTIVEC_BUILTIN_VMINUH: + case ALTIVEC_BUILTIN_VMAXUW: + case ALTIVEC_BUILTIN_VMINUW: + case P8V_BUILTIN_VMAXUD: + case P8V_BUILTIN_VMINUD: h.uns_p[0] = 1; h.uns_p[1] = 1; h.uns_p[2] = 1; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 006b992733a..fdd4a90ddca 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2017-06-02 Will Schmidt + + * gcc.target/powerpc/fold-vec-minmax-char.c: New. + * gcc.target/powerpc/fold-vec-minmax-floatdouble.c: New. + * gcc.target/powerpc/fold-vec-minmax-int.c: New. + * gcc.target/powerpc/fold-vec-minmax-longlong.c: New. + * gcc.target/powerpc/fold-vec-minmax-short.c: New. + 2017-06-02 Kyrylo Tkachov * gcc.target/aarch64/atomic_cmp_exchange_zero_strong_1.c: New test. diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-char.c new file mode 100644 index 00000000000..9df6ecdcd75 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-char.c @@ -0,0 +1,37 @@ +/* Verify that overloaded built-ins for vec_min with char + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec" } */ + +#include + +vector signed char +test3_min (vector signed char x, vector signed char y) +{ + return vec_min (x, y); +} + +vector unsigned char +test6_min (vector unsigned char x, vector unsigned char y) +{ + return vec_min (x, y); +} + +vector signed char +test3_max (vector signed char x, vector signed char y) +{ + return vec_max (x, y); +} + +vector unsigned char +test6_max (vector unsigned char x, vector unsigned char y) +{ + return vec_max (x, y); +} + +/* { dg-final { scan-assembler-times "vminsb" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsb" 1 } } */ +/* { dg-final { scan-assembler-times "vminub" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxub" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-floatdouble.c new file mode 100644 index 00000000000..1185ce28f45 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-floatdouble.c @@ -0,0 +1,37 @@ +/* Verify that overloaded built-ins for vec_max with float and + double inputs for VSX produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include + +vector float +test1_min (vector float x, vector float y) +{ + return vec_min (x, y); +} + +vector double +test2_min (vector double x, vector double y) +{ + return vec_min (x, y); +} + +vector float +test1_max (vector float x, vector float y) +{ + return vec_max (x, y); +} + +vector double +test2_max (vector double x, vector double y) +{ + return vec_max (x, y); +} + +/* { dg-final { scan-assembler-times "vminsp" 1 } } */ +/* { dg-final { scan-assembler-times "vmindp" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsp" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxdp" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-int.c new file mode 100644 index 00000000000..1ce1c2bab1c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-int.c @@ -0,0 +1,37 @@ +/* Verify that overloaded built-ins for vec_min with int + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include + +vector signed int +test3_min (vector signed int x, vector signed int y) +{ + return vec_min (x, y); +} + +vector unsigned int +test6_min (vector unsigned int x, vector unsigned int y) +{ + return vec_min (x, y); +} + +vector signed int +test3_max (vector signed int x, vector signed int y) +{ + return vec_max (x, y); +} + +vector unsigned int +test6_max (vector unsigned int x, vector unsigned int y) +{ + return vec_max (x, y); +} + +/* { dg-final { scan-assembler-times "vminsw" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsw" 1 } } */ +/* { dg-final { scan-assembler-times "vminuw" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxuw" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c new file mode 100644 index 00000000000..ed9c66db34b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c @@ -0,0 +1,37 @@ +/* Verify that overloaded built-ins for vec_min with long long + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mpower8-vector" } */ + +#include + +vector signed long long +test3_min (vector signed long long x, vector signed long long y) +{ + return vec_min (x, y); +} + +vector unsigned long long +test6_min (vector unsigned long long x, vector unsigned long long y) +{ + return vec_min (x, y); +} + +vector signed long long +test3_max (vector signed long long x, vector signed long long y) +{ + return vec_max (x, y); +} + +vector unsigned long long +test6_max (vector unsigned long long x, vector unsigned long long y) +{ + return vec_max (x, y); +} + +/* { dg-final { scan-assembler-times "vminsd" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsd" 1 } } */ +/* { dg-final { scan-assembler-times "vminud" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxud" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-short.c new file mode 100644 index 00000000000..fa608c9e9bc --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-short.c @@ -0,0 +1,37 @@ +/* Verify that overloaded built-ins for vec_min with short + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec" } */ + +#include + +vector signed short +test3_min (vector signed short x, vector signed short y) +{ + return vec_min (x, y); +} + +vector unsigned short +test6_min (vector unsigned short x, vector unsigned short y) +{ + return vec_min (x, y); +} + +vector signed short +test3_max (vector signed short x, vector signed short y) +{ + return vec_max (x, y); +} + +vector unsigned short +test6_max (vector unsigned short x, vector unsigned short y) +{ + return vec_max (x, y); +} + +/* { dg-final { scan-assembler-times "vminsh" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsh" 1 } } */ +/* { dg-final { scan-assembler-times "vminuh" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxuh" 1 } } */