From: Andreas Hansson <andreas.hansson@arm.com>
Date: Tue, 19 Feb 2013 10:56:06 +0000 (-0500)
Subject: scons: Add warning for missing field initializers
X-Git-Tag: stable_2013_06_16~92
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d670fa60a105676a19dd91440f66dc186450b3e8;p=gem5.git

scons: Add warning for missing field initializers

This patch adds a warning for missing field initializers for both gcc
and clang, and addresses the warnings that were generated.
---

diff --git a/SConstruct b/SConstruct
index 3d15f1db6..e91cc0599 100755
--- a/SConstruct
+++ b/SConstruct
@@ -528,6 +528,7 @@ if main['GCC']:
     main.Append(CCFLAGS=['-pipe'])
     main.Append(CCFLAGS=['-fno-strict-aliasing'])
     main.Append(CCFLAGS=['-Wall', '-Wno-sign-compare', '-Wundef'])
+    main.Append(CXXFLAGS=['-Wmissing-field-initializers'])
     main.Append(CXXFLAGS=['-std=c++0x'])
 
     # Check for versions with bugs
@@ -577,6 +578,7 @@ elif main['CLANG']:
     # Ruby makes frequent use of extraneous parantheses in the printing
     # of if-statements
     main.Append(CCFLAGS=['-Wno-parentheses'])
+    main.Append(CXXFLAGS=['-Wmissing-field-initializers'])
     main.Append(CXXFLAGS=['-std=c++0x'])
     # On Mac OS X/Darwin we need to also use libc++ (part of XCode) as
     # opposed to libstdc++ to make the transition from TR1 to
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index 061392f59..be1c7ecc2 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -53,31 +53,32 @@ namespace ArmISA
 {
 
 template<> ArmFault::FaultVals ArmFaultVals<Reset>::vals =
-    {"reset", 0x00, MODE_SVC, 0, 0, true, true};
+{"reset", 0x00, MODE_SVC, 0, 0, true, true, FaultStat()};
 
 template<> ArmFault::FaultVals ArmFaultVals<UndefinedInstruction>::vals =
-    {"Undefined Instruction", 0x04, MODE_UNDEFINED, 4 ,2, false, false} ;
+{"Undefined Instruction", 0x04, MODE_UNDEFINED, 4 ,2, false, false,
+ FaultStat()} ;
 
 template<> ArmFault::FaultVals ArmFaultVals<SupervisorCall>::vals =
-    {"Supervisor Call", 0x08, MODE_SVC, 4, 2, false, false};
+{"Supervisor Call", 0x08, MODE_SVC, 4, 2, false, false, FaultStat()};
 
 template<> ArmFault::FaultVals ArmFaultVals<PrefetchAbort>::vals =
-    {"Prefetch Abort", 0x0C, MODE_ABORT, 4, 4, true, false};
+{"Prefetch Abort", 0x0C, MODE_ABORT, 4, 4, true, false, FaultStat()};
 
 template<> ArmFault::FaultVals ArmFaultVals<DataAbort>::vals =
-    {"Data Abort", 0x10, MODE_ABORT, 8, 8, true, false};
+{"Data Abort", 0x10, MODE_ABORT, 8, 8, true, false, FaultStat()};
 
 template<> ArmFault::FaultVals ArmFaultVals<Interrupt>::vals =
-    {"IRQ", 0x18, MODE_IRQ, 4, 4, true, false};
+{"IRQ", 0x18, MODE_IRQ, 4, 4, true, false, FaultStat()};
 
 template<> ArmFault::FaultVals ArmFaultVals<FastInterrupt>::vals =
-    {"FIQ", 0x1C, MODE_FIQ, 4, 4, true, true};
+{"FIQ", 0x1C, MODE_FIQ, 4, 4, true, true, FaultStat()};
 
 template<> ArmFault::FaultVals ArmFaultVals<FlushPipe>::vals =
-    {"Pipe Flush", 0x00, MODE_SVC, 0, 0, true, true}; // some dummy values
+{"Pipe Flush", 0x00, MODE_SVC, 0, 0, true, true, FaultStat()}; // dummy values
 
 template<> ArmFault::FaultVals ArmFaultVals<ArmSev>::vals =
-    {"ArmSev Flush", 0x00, MODE_SVC, 0, 0, true, true}; // some dummy values
+{"ArmSev Flush", 0x00, MODE_SVC, 0, 0, true, true, FaultStat()}; // dummy values
 Addr 
 ArmFault::getVector(ThreadContext *tc)
 {
diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc
index c0f2701bd..a5c8a3a4e 100644
--- a/src/arch/sparc/faults.cc
+++ b/src/arch/sparc/faults.cc
@@ -51,31 +51,31 @@ namespace SparcISA
 
 template<> SparcFaultBase::FaultVals
     SparcFault<PowerOnReset>::vals =
-    {"power_on_reset", 0x001, 0, {H, H, H}};
+{"power_on_reset", 0x001, 0, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<WatchDogReset>::vals =
-    {"watch_dog_reset", 0x002, 120, {H, H, H}};
+{"watch_dog_reset", 0x002, 120, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<ExternallyInitiatedReset>::vals =
-    {"externally_initiated_reset", 0x003, 110, {H, H, H}};
+{"externally_initiated_reset", 0x003, 110, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<SoftwareInitiatedReset>::vals =
-    {"software_initiated_reset", 0x004, 130, {SH, SH, H}};
+{"software_initiated_reset", 0x004, 130, {SH, SH, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<REDStateException>::vals =
-    {"RED_state_exception", 0x005, 1, {H, H, H}};
+{"RED_state_exception", 0x005, 1, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<StoreError>::vals =
-    {"store_error", 0x007, 201, {H, H, H}};
+{"store_error", 0x007, 201, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<InstructionAccessException>::vals =
-    {"instruction_access_exception", 0x008, 300, {H, H, H}};
+{"instruction_access_exception", 0x008, 300, {H, H, H}, FaultStat()};
 
 //XXX This trap is apparently dropped from ua2005
 /*template<> SparcFaultBase::FaultVals
@@ -84,15 +84,15 @@ template<> SparcFaultBase::FaultVals
 
 template<> SparcFaultBase::FaultVals
     SparcFault<InstructionAccessError>::vals =
-    {"instruction_access_error", 0x00A, 400, {H, H, H}};
+{"instruction_access_error", 0x00A, 400, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<IllegalInstruction>::vals =
-    {"illegal_instruction", 0x010, 620, {H, H, H}};
+{"illegal_instruction", 0x010, 620, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<PrivilegedOpcode>::vals =
-    {"privileged_opcode", 0x011, 700, {P, SH, SH}};
+{"privileged_opcode", 0x011, 700, {P, SH, SH}, FaultStat()};
 
 //XXX This trap is apparently dropped from ua2005
 /*template<> SparcFaultBase::FaultVals
@@ -106,43 +106,43 @@ template<> SparcFaultBase::FaultVals
 
 template<> SparcFaultBase::FaultVals
     SparcFault<FpDisabled>::vals =
-    {"fp_disabled", 0x020, 800, {P, P, H}};
+{"fp_disabled", 0x020, 800, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<FpExceptionIEEE754>::vals =
-    {"fp_exception_ieee_754", 0x021, 1110, {P, P, H}};
+{"fp_exception_ieee_754", 0x021, 1110, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<FpExceptionOther>::vals =
-    {"fp_exception_other", 0x022, 1110, {P, P, H}};
+{"fp_exception_other", 0x022, 1110, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<TagOverflow>::vals =
-    {"tag_overflow", 0x023, 1400, {P, P, H}};
+{"tag_overflow", 0x023, 1400, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<CleanWindow>::vals =
-    {"clean_window", 0x024, 1010, {P, P, H}};
+{"clean_window", 0x024, 1010, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<DivisionByZero>::vals =
-    {"division_by_zero", 0x028, 1500, {P, P, H}};
+{"division_by_zero", 0x028, 1500, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<InternalProcessorError>::vals =
-    {"internal_processor_error", 0x029, 4, {H, H, H}};
+{"internal_processor_error", 0x029, 4, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<InstructionInvalidTSBEntry>::vals =
-    {"instruction_invalid_tsb_entry", 0x02A, 210, {H, H, SH}};
+{"instruction_invalid_tsb_entry", 0x02A, 210, {H, H, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<DataInvalidTSBEntry>::vals =
-    {"data_invalid_tsb_entry", 0x02B, 1203, {H, H, H}};
+{"data_invalid_tsb_entry", 0x02B, 1203, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<DataAccessException>::vals =
-    {"data_access_exception", 0x030, 1201, {H, H, H}};
+{"data_access_exception", 0x030, 1201, {H, H, H}, FaultStat()};
 
 //XXX This trap is apparently dropped from ua2005
 /*template<> SparcFaultBase::FaultVals
@@ -151,43 +151,43 @@ template<> SparcFaultBase::FaultVals
 
 template<> SparcFaultBase::FaultVals
     SparcFault<DataAccessError>::vals =
-    {"data_access_error", 0x032, 1210, {H, H, H}};
+{"data_access_error", 0x032, 1210, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<DataAccessProtection>::vals =
-    {"data_access_protection", 0x033, 1207, {H, H, H}};
+{"data_access_protection", 0x033, 1207, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<MemAddressNotAligned>::vals =
-    {"mem_address_not_aligned", 0x034, 1020, {H, H, H}};
+{"mem_address_not_aligned", 0x034, 1020, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<LDDFMemAddressNotAligned>::vals =
-    {"LDDF_mem_address_not_aligned", 0x035, 1010, {H, H, H}};
+{"LDDF_mem_address_not_aligned", 0x035, 1010, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<STDFMemAddressNotAligned>::vals =
-    {"STDF_mem_address_not_aligned", 0x036, 1010, {H, H, H}};
+{"STDF_mem_address_not_aligned", 0x036, 1010, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<PrivilegedAction>::vals =
-    {"privileged_action", 0x037, 1110, {H, H, SH}};
+{"privileged_action", 0x037, 1110, {H, H, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<LDQFMemAddressNotAligned>::vals =
-    {"LDQF_mem_address_not_aligned", 0x038, 1010, {H, H, H}};
+{"LDQF_mem_address_not_aligned", 0x038, 1010, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<STQFMemAddressNotAligned>::vals =
-    {"STQF_mem_address_not_aligned", 0x039, 1010, {H, H, H}};
+{"STQF_mem_address_not_aligned", 0x039, 1010, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<InstructionRealTranslationMiss>::vals =
-    {"instruction_real_translation_miss", 0x03E, 208, {H, H, SH}};
+{"instruction_real_translation_miss", 0x03E, 208, {H, H, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<DataRealTranslationMiss>::vals =
-    {"data_real_translation_miss", 0x03F, 1203, {H, H, H}};
+{"data_real_translation_miss", 0x03F, 1203, {H, H, H}, FaultStat()};
 
 //XXX This trap is apparently dropped from ua2005
 /*template<> SparcFaultBase::FaultVals
@@ -196,75 +196,75 @@ template<> SparcFaultBase::FaultVals
 
 template<> SparcFaultBase::FaultVals
     SparcFault<InterruptLevelN>::vals =
-    {"interrupt_level_n", 0x040, 0, {P, P, SH}};
+{"interrupt_level_n", 0x040, 0, {P, P, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<HstickMatch>::vals =
-    {"hstick_match", 0x05E, 1601, {H, H, H}};
+{"hstick_match", 0x05E, 1601, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<TrapLevelZero>::vals =
-    {"trap_level_zero", 0x05F, 202, {H, H, SH}};
+{"trap_level_zero", 0x05F, 202, {H, H, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<InterruptVector>::vals =
-    {"interrupt_vector", 0x060, 2630, {H, H, H}};
+{"interrupt_vector", 0x060, 2630, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<PAWatchpoint>::vals =
-    {"PA_watchpoint", 0x061, 1209, {H, H, H}};
+{"PA_watchpoint", 0x061, 1209, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<VAWatchpoint>::vals =
-    {"VA_watchpoint", 0x062, 1120, {P, P, SH}};
+{"VA_watchpoint", 0x062, 1120, {P, P, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<FastInstructionAccessMMUMiss>::vals =
-    {"fast_instruction_access_MMU_miss", 0x064, 208, {H, H, SH}};
+{"fast_instruction_access_MMU_miss", 0x064, 208, {H, H, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<FastDataAccessMMUMiss>::vals =
-    {"fast_data_access_MMU_miss", 0x068, 1203, {H, H, H}};
+{"fast_data_access_MMU_miss", 0x068, 1203, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<FastDataAccessProtection>::vals =
-    {"fast_data_access_protection", 0x06C, 1207, {H, H, H}};
+{"fast_data_access_protection", 0x06C, 1207, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<InstructionBreakpoint>::vals =
-    {"instruction_break", 0x076, 610, {H, H, H}};
+{"instruction_break", 0x076, 610, {H, H, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<CpuMondo>::vals =
-    {"cpu_mondo", 0x07C, 1608, {P, P, SH}};
+{"cpu_mondo", 0x07C, 1608, {P, P, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<DevMondo>::vals =
-    {"dev_mondo", 0x07D, 1611, {P, P, SH}};
+{"dev_mondo", 0x07D, 1611, {P, P, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<ResumableError>::vals =
-    {"resume_error", 0x07E, 3330, {P, P, SH}};
+{"resume_error", 0x07E, 3330, {P, P, SH}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<SpillNNormal>::vals =
-    {"spill_n_normal", 0x080, 900, {P, P, H}};
+{"spill_n_normal", 0x080, 900, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<SpillNOther>::vals =
-    {"spill_n_other", 0x0A0, 900, {P, P, H}};
+{"spill_n_other", 0x0A0, 900, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<FillNNormal>::vals =
-    {"fill_n_normal", 0x0C0, 900, {P, P, H}};
+{"fill_n_normal", 0x0C0, 900, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<FillNOther>::vals =
-    {"fill_n_other", 0x0E0, 900, {P, P, H}};
+{"fill_n_other", 0x0E0, 900, {P, P, H}, FaultStat()};
 
 template<> SparcFaultBase::FaultVals
     SparcFault<TrapInstruction>::vals =
-    {"trap_instruction", 0x100, 1602, {P, P, H}};
+{"trap_instruction", 0x100, 1602, {P, P, H}, FaultStat()};
 
 /**
  * This causes the thread context to enter RED state. This causes the side