From: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Wed, 17 Feb 2016 21:23:45 +0000 (-0800)
Subject: i965/nir: Do lower_io late for fragment shaders
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d67d84f5e568feaa988bdda6a23c84aa34b8bbaf;p=mesa.git

i965/nir: Do lower_io late for fragment shaders
---

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 7e161e8bb48..bb22cfa5fab 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -5606,6 +5606,8 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
    nir_shader *shader = nir_shader_clone(mem_ctx, src_shader);
    shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex,
                                       true);
+   shader = brw_nir_lower_io(shader, compiler->devinfo, true,
+                             false, NULL);
    shader = brw_postprocess_nir(shader, compiler->devinfo, true);
 
    /* key->alpha_test_func means simulating alpha testing via discards,
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 44446694b4b..e9351a5556a 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -637,7 +637,8 @@ brw_create_nir(struct brw_context *brw,
 
    if (nir->stage != MESA_SHADER_VERTEX &&
        nir->stage != MESA_SHADER_TESS_CTRL &&
-       nir->stage != MESA_SHADER_TESS_EVAL) {
+       nir->stage != MESA_SHADER_TESS_EVAL &&
+       nir->stage != MESA_SHADER_FRAGMENT) {
       nir = brw_nir_lower_io(nir, devinfo, is_scalar, false, NULL);
    }
 
diff --git a/src/vulkan/anv_pipeline.c b/src/vulkan/anv_pipeline.c
index 21df3e081a3..e6cc8faf4fc 100644
--- a/src/vulkan/anv_pipeline.c
+++ b/src/vulkan/anv_pipeline.c
@@ -390,7 +390,8 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
    /* Finish the optimization and compilation process */
    if (nir->stage != MESA_SHADER_VERTEX &&
        nir->stage != MESA_SHADER_TESS_CTRL &&
-       nir->stage != MESA_SHADER_TESS_EVAL) {
+       nir->stage != MESA_SHADER_TESS_EVAL &&
+       nir->stage != MESA_SHADER_FRAGMENT) {
       nir = brw_nir_lower_io(nir, &pipeline->device->info,
                              compiler->scalar_stage[stage], false, NULL);
    }