From: Connor Abbott Date: Fri, 24 May 2019 13:08:06 +0000 (+0200) Subject: radeonsi/nir: Fix type in bindless address computation X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d68218dbca9c41d94e1547e82b6930750d9edb66;p=mesa.git radeonsi/nir: Fix type in bindless address computation Bindless handles in GL are 64-bit. This fixes an assert failure in LLVM. Reviewed-by: Marek Olšák --- diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c index 19ed71ae05d..72e6ffbac8a 100644 --- a/src/gallium/drivers/radeonsi/si_shader_nir.c +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c @@ -1020,7 +1020,7 @@ si_nir_load_sampler_desc(struct ac_shader_abi *abi, * 16-dword slots for now. */ dynamic_index = LLVMBuildMul(ctx->ac.builder, dynamic_index, - LLVMConstInt(ctx->i32, 2, 0), ""); + LLVMConstInt(ctx->i64, 2, 0), ""); return si_load_image_desc(ctx, list, dynamic_index, desc_type, dcc_off, true); @@ -1032,7 +1032,7 @@ si_nir_load_sampler_desc(struct ac_shader_abi *abi, * to prevent incorrect code generation and hangs. */ dynamic_index = LLVMBuildMul(ctx->ac.builder, dynamic_index, - LLVMConstInt(ctx->i32, 2, 0), ""); + LLVMConstInt(ctx->i64, 2, 0), ""); list = ac_build_pointer_add(&ctx->ac, list, dynamic_index); return si_load_sampler_desc(ctx, list, ctx->i32_0, desc_type); }