From: Luke Kenneth Casson Leighton Date: Sun, 5 Jul 2020 14:29:27 +0000 (+0100) Subject: check xer_out not xer_in X-Git-Tag: div_pipeline~162^2~58 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d6e1c988c5d85167643bf1be7cb90744586893e2;p=soc.git check xer_out not xer_in --- diff --git a/src/soc/fu/test/common.py b/src/soc/fu/test/common.py index a5c7f816..e41ee4b3 100644 --- a/src/soc/fu/test/common.py +++ b/src/soc/fu/test/common.py @@ -232,21 +232,21 @@ class ALUHelpers: def get_xer_so(res, alu, dec2): oe = yield dec2.e.oe.oe oe_ok = yield dec2.e.oe.ok - xer_in = yield dec2.e.xer_in - if xer_in or (oe and oe_ok): + xer_out = yield dec2.e.xer_out + if xer_out or (oe and oe_ok): res['xer_so'] = yield alu.n.data_o.xer_so.data[0] def get_xer_ov(res, alu, dec2): oe = yield dec2.e.oe.oe oe_ok = yield dec2.e.oe.ok - xer_in = yield dec2.e.xer_in - if xer_in or (oe and oe_ok): + xer_out = yield dec2.e.xer_out + if xer_out or (oe and oe_ok): res['xer_ov'] = yield alu.n.data_o.xer_ov.data def get_xer_ca(res, alu, dec2): cry_out = yield dec2.e.output_carry - xer_in = yield dec2.e.xer_in - if xer_in or (cry_out): + xer_out = yield dec2.e.xer_out + if xer_out or (cry_out): res['xer_ca'] = yield alu.n.data_o.xer_ca.data def get_sim_int_o(res, sim, dec2):