From: whitequark Date: Tue, 26 Jan 2021 21:18:06 +0000 (+0000) Subject: Merge pull request #2544 from modwizcode/fix-clock X-Git-Tag: working-ls180~109 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d73ffa07f2fccc0da396276955f64648becab173;p=yosys.git Merge pull request #2544 from modwizcode/fix-clock CXXRTL: Fix sliced bits as clock inputs --- d73ffa07f2fccc0da396276955f64648becab173